View Full Version : Eagle Library.

11-03-2012, 01:03 PM
Hey Paul

I got my T3 and it pretty much just booted up and worked. I am very excited about it. I am blown away about how cool this little device is!

Now that I am using it I have a couple of simple questions. I am sorry for clumping them all together, but I think they are all pretty easy to answer.

1) Has anyone made an Eagle library for the T3 yet? If not, let me know and I might try to make one.

2) Can you post a picture or howto of cutting the lines for external power with maybe a little more description of the process.

3) I saw someone solder on a surface mount idc connector to get access to the interior pins. Do you have a part number for this?

4) How fast are the ADC's? So far when i've tried using them, they seem really slow (like 400-500usec slow).


11-03-2012, 03:38 PM
Regarding item (4), see this post: http://forum.pjrc.com/threads/38-Help-with-ADC-speed

11-03-2012, 06:48 PM
Hey JB, thanks for the link but it sounds like I'm not the only one who noticed this. I am hopeful that this isn't the true speed of the ADC because it really reduces the usefulness of the T3 for my application.

11-03-2012, 08:03 PM
Just updated the thread above, ADC times of 3.75us for 10 bit samples, just as in the Freescale K20 manual :)

11-04-2012, 02:24 AM
Awesome cd... thanks so much for that!

11-04-2012, 11:43 PM
Hey Guys,

I just made an eagle library of the through holes. Here it is. I haven't really tested it, other than to see how it looked.

Teensy 3.0 Library (https://dl.dropbox.com/u/6859880/Teensy/Teensy.lbr)

Any feedback would be appreciated.


11-05-2012, 08:19 PM
Hi Doug,

Thanks for taking a shot at the Eagle library. I'm going to be designing some PCBs around the Teensy 3 and I'd be happy to provide feedback as I go along. Just a couple of cosmetic issues I noticed initially:

* P7 is labeled as "P5_CS1", but should probably be "P5_TX1"?
* P8 is "P6_DOUT" but should really be "P6_CS1"
* Broader question - are 3.3V2 and GND2 really separate from 3.3V and GND?

That's all for now. Thanks!

11-06-2012, 01:51 AM
Another minor issue - you have a stray via for pin 9 waaay off board in the package design.

11-06-2012, 03:46 AM
Wow sure enough. I don't know how that stray happened. I corrected it and renamed the other signals. The grounds and voltages are probably tied together, but I couldn't be certain without my voltmeter. (I am sitting on my couch doing this). Here is the link to get the newer library, (I just overwrote the link above).

Thanks for looking at it indrasstra!

Updated Teensy 3.0 Link (https://dl.dropbox.com/u/6859880/Teensy/Teensy.lbr)


11-06-2012, 10:40 PM
Thanks, Doug, that's better.

I just noticed that when running a DRC with standard settings, I get "dimension" errors on all of the vias. I'm not familiar enough with DRC rules to know what is causing it, but I've attached a screenshot. I understand I may have to tweak my settings, since the space constraints of the Teensy may require relaxing the clearance, but it still seems odd for a library part to complain about this internally.


By the way, have you thought about putting the library up on Github? I created a library part for the uSD socket used on the Teensy MicroSD breakout board, since I'm basically incorporating that into a design for the T3. Paul - do you have any input or feedback on this? I'd imagine you already have Eagle stuff for the things we are discussing.

11-07-2012, 12:54 AM
Hey Indraastra,

Thanks for pointing this out.

I modified the outline to take care of this. I ran the DRC and it seems to work fine now.

Here is the link again: Teensy3 Library Version 1.3 (https://dl.dropbox.com/u/6859880/Teensy/Teensy.lbr)

I really don't know much about GitHub, I guess I could figure it out. I was just trying to help people trying to use this part.:cool:


11-08-2012, 12:22 AM
Thanks, Doug. Just curious, what was the fix? Did you change the size of the outline?

No worries on the github thing, I was just wondering. Maybe once it's been tried and tested a bit more you could publish it somewhere for posterity.

11-08-2012, 03:01 AM
I accidentally set the outline to dimension layer... It is board creation habit. Easy to fix at least!

Paul might want to publish it or something or put it as a download on his site. My assumption is if I am needing it, others will too. Hopefully it will come in handy.

11-08-2012, 10:34 AM
Actually, I don't use Eagle, so I can't help with this. But when there's a confirmed good library, please let me know. I'll be happy to put it on the website or link to it, of course with credit to the author.

With Teensy 2.0, a problem with the libraries people made was the hole size not being large enough for the headers that are commonly available. The minimum recommended finished hole diameter is 0.038 inch (0.965 mm).

11-08-2012, 05:13 PM
Hey Paul, I used 0.047244 inch holes. On the schematic.

11-08-2012, 05:38 PM
Okay, I updated the Board putting pin numbers on the silk for people who don't like using schematics...lol

Teensy 3.0 Library Version 1.4 (https://dl.dropbox.com/u/6859880/Teensy/Teensy.lbr)

11-09-2012, 11:12 PM
Hey Paul, do you happen to have a schematic of the Teensy 3.0 like you have on your site with the Teensy 2.0? A Library for the Teensy 3.0 sounds like a great idea, but I'd like to know the connections for the ARM in the situation that I'd need to embed this circuit into my own designs.

11-10-2012, 08:05 PM
3) i'm using CMS2A-14-5.8/3.3-G from antelec

and the counterpart FT2-14-G-508

11-11-2012, 01:25 AM
Thank you so much HWGuy for answering this. I was getting worried that it got lost in the stream of talking about the Eagle Library.

07-05-2014, 08:06 PM
Has anyone created an Eagle library for the SD Card Adaptor (http://www.pjrc.com/store/sd_adaptor.html)?

07-05-2014, 10:21 PM