auron

Hm, there is loads of IO for parallel reads from the ADCs, and 10Mhz sampling rate seemed fair at 600Mhz chip clock. Sure, I would likely need DMA, or maybe I could get by with well written ISR. But that has been done, I figured. Why do you...

Sorry, completely missed the form factor. Don't know where my head was. Thanks for setting me straight. Doing my research again, it seems 8MB/64Mbit per chip is the best we can get at the moment for SOP-8 PSRAM. So I'll have to redesign and...

I am trying to find out if a pet project of mine would be doable with Teensy 4.1, but I need to sample and store about 240Mbit in one second - 2 channels, 12 bit, one second at 10 Mhz. (using separate ADCs like AD9230), optionally double that. I...