grinch

How does 16x16 mode work with the I2C multiplexing? It seems like each codec chip needs its own multiplexer channel and there are currently only 4? Do you use a different I2C line or set it up with a different multiplexer?

Thank you for sharing! Interesting, I would have figured there would be some sort of daisy chain configuration for the codecs but it appears TDM is wired to all the chips in parallel. How is that working in software? By what mechanism are the...

Ty for component rec, this is very helpful! So for Ferrite bead the 600 refers to 600 ohm at 100MHz?

Yah this is why! I've always been confused as to why so many of these open source audio designs leave out the ground reference 🤔

Very cool! Is the full schematic / layout online anywhere to take a look? I notice the resistors and caps around the codec chips are pretty spaced out, is that done for any signal integrity reason or just aesthetic? Would be interested in...

Hi, I am incorporating an SGTL5000 codec into a larger PCB design. I'm basing my schematic and layout on the SGTL5000 breakout board: https://www.pjrc.com/store/teensy3_audio.html I wanted to share my schematic to confirm I got the design...

There probably is a way to make the SPI process faster by using DMA instead of an interrupt. Some complexity there because I need CS written low to high right on a sample downbeat rather than after any SPI processing. Interrupt worked well enough...

What I mean is would I get 1 word clock per sample? And one sample written out at a time at audio rate? It sounds like this is the case. I am just making sure TDM isn't writing out a buffer of several consecutive samples at a time. The actual...

Also this is more in the category of general project advice, but does the differential transmitter / receiver + Shielded CAT6 and Schmitt trigger setup seem reasonable for sending signal between PCBs? CAT6 runs will mostly be < 12" at most < 36"

So I guess the idea would be to write TDM data out once per sample and use the TDM word clock as the "chip select"? Could the TDM data outputs could share one word and bit clock output? What is the maximum number of data pins for TDM on the...

Sorry I mispoke, 88.2 kHz interrupt

It's audio like, essentially a bunch of 1-bit / square wave audio channels. The project is for musical robotics. Used the 64 channel version to build this if you're interested: https://emmettpalaima.com/CATHEDRAL-64 Because the shift registers...

I thought they could be run faster if you configure the clock outside of the library function? For FlexIO, can that be controllable via DMA? And can the pin assignment be the same as the regular SPI port?

Hi, I'm working on a project where I need to control a large number of shift register outputs updated at 44.1kHz audio rate. I built a board in the past that worked well for controlling 64 outputs (8 shift registers), I'm now working to expand it...

Keep us posted, we're all rooting for you! 🙏✨