las564

Thank you for your advice, I have been playing around with my code and have found that the timing bug is caused by the else if statement in the isr: changing the statement from else if(daddr == (uint32_t)dma_rx_buffer + DMA_BUFFER_SIZE - 1) { to...

Ah what a silly mistake, thank you for catching that. Unfortunately the behavior is still the same, so there must be some thing else going on, but I would have needed to fix this regardless, so thanks again.

Hello, I am working on building a data acquisition system for 5x FUTEK LSB206 Load cells with UART output using a Teensy 4.1. The load cells use QIA128 controller chips to interface with a host system via UART, which is more thoroughly documented...