rkmaddox

Oh my gosh I see it now. If I were going to do it that way I guess it would need to be & on those ~ lines, rather than |. I've taken them out and I'm getting a signal on SPDIF_OUT now. Thank you!

Any ideas which config options are incorrect? I set them to things I thought made sense, but clearly have not gotten it right yet (unless the problem is somewhere else).

I added the code from that function and still don't see anything on the SPDIF_OUT pin. I also tried to set the registers so that it clocked from the PLL rather than EXT_CLK and still did not see anything, though I am not at all confident I did it...

Ahhhh, the last time I did a SPDIF project it had a signal coming in and extracted its clock from that, so it worked without turning that PLL on. The code for turning on the PLL is here, right...

Hi there, I have a project for which I want the Teensy 4 to take in an external master audio clock generated by a different component on the SPDIF_EXT_CLK pin and transmit audio synchronized to that clock on SPDIF_OUT. I only need that audio for...