theboot900

It makes me wonder how well an SRAM chip would compare performance wise. Something like 4 Megabyte IS61WV204816BLL-10TLI. The imxrt1060 datasheet does say the memory controller supports external Sram...

Good idea. I'll give that a go!

Thanks. I'll try a bunch of different values and see if I can get an improvement. It's always bits 8 to 15 that error out (when reading the 32 bit words)

Yes I tried a 10pf and a 6pf. But ive put it down to my lack of professional routing skills. And also in trying to keep power filtering capacitors all to one side of the board they would not be optimally placed.

Thanks! Definitely wouldn't have been able to do it without you and rezo

No you would have to route one yourself. I didn't have any use for one and initially was just going to be 3.3v only. I added 3.3v regulator to be able to power of 5v usb.

I've designed a DIY Teensy 4.1 based board with Sdram with the idea of being able to solder it yourself. (It requires a stencil and solder paste as well). I don't have a hot plate, so i have been heating them with hot air from underneath. It...

If your just reading a 32 bit register I wouldn't bother with adding the pin definitions (it's a pain) Eg, GPIO7 is the B0,B1 register uint32_t value = GPIO7_PSR; (it's fast this way) I'm not sure what GPIO the 32 bit EMC register is

EMC 0 to 31 or GPIO B0-B1 are the only 2 options for a full 32 bit wide bus The AD_B bank you can get a 16 bit sequential bus. 7 of the lower pins are used for the bootloader. The remaining 32 bit bank is a mix of EMC 32+ and the SDIO banks...

Ahh yep, linked lists are horrible when it comes to caching. You would be doing a lot of out of order memory reading and writing on the psram, which would be killing the effeciency.

This doesn't seem right. Is there anything else going on when setting up your objects in extmem. I would do some profiling with using ARM_DWT_CYCCNT and count how many clock cycles it's taking.

Nice work that looks good!!

I'm pretty sure it just pads the lowest bits as 0's for each colour. So in the 565 format if you had 5 bits of red, when converted to 888 the lower 3 bits would be 0 (1111 1000) This is a lot smaller dynamic range then if doing a proper...

Are you running 24bit or 16bit? I like the speed of 16bit. However from what i can understand having 16bit padded input and 24bit data, it will do the conversion and just pad the lower bits of data with 0's. I dont think this gives as good as...

It sure did!!!! 10 hours of trouble shooting this and you have just solved it. i needed to set the DockCLK Polarity. I also needed to reverse the polarity on the Vsync and HSync to get it to work LCDIF_VDCTRL0 = LCDIF_VDCTRL0_ENABLE_PRESENT...

So using dogbones board im driving a controllerless 800x480 display from buydisplay.com I've made an adaptor pcb with a constant current driver for the backlight as well as a 40 pin ziff connector (had to hand solder, forgot to click the stencil...

Of course you can. Back in the day graphical adventure games used to run on 8mhz machines, sometimes taking well over 10 clock cycles per instruction. A teensy 4 runs at 600mhz! It can execute 2 instructions per clock cycles I love seeing...

I had no luck getting SDRAM to SDRAM at a decent speed with DMA. The fastest i could get transfers with copying from 1 buffer in SDRAM to another in SDRAM and SDRAM overclocked to 221 was using an Assembly routine. Load registers 3 to 10...

Has anyone tested using edma to copy from sdram to sdram to see how much quicker it is than a memcopy? For example copying an image from sdram into a backbuffer in sdram.

My board from dogbones schematic uses the D version. I had to change a lot off parts to ones JLCPCB had in stock, as well as change a lot of the components to standard components to not get stung with extra setup fees. I do wish there was some...

If you’re using a smart display with a built in controller then take a look at my ILI9488 FlexIO/DMA driver for some inspiration https://github.com/david-res/ILI948x_t4_mm Ive recently purchased some 7” displays from BuyDisplay that are...

That's awesome! Thanks for that, it's definitely some inspiration and help.

Thanks Jmarsh. Theres another 2 weeks of trying to learn FlexIO and DMA. The setup looks complicated. I might just get a bare display from buydisplay and try to drive one of them with lcdif pxlck mode seeing as ive wrapped my head around...

I've tried mixing and matching many different register settings and could not get mpu or vsync only mode to work. Have you got any libraries or code for Flexio and Dma?

So im still bashing my head against a wall here. But i think your right. And if we could get the APBDMA mode working it only supports 16 bit. Is 16 the maximum burst length for sdram reads? Im intent on trying to get data out without using...

Oh man if I new that was there 3 days ago. I'll have a good look at that, thanks. Is it using the lcd module to output? Currently I'm going to use it on a smart(er) display, ssd1963 (has back buffer memory) but eventually a dumb display...

I've got DogBones board up and running with the replacement flash chip. It works great. Been running some 24bit LCD screen tests. I've been bashing my head against the wall trying to output using the LCDIF without much success. In theory it...