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JBeale, your results seems unreal (good), but we transfer the data via serial as they are taken, so serial is on...see my graph i plotted, i would be very happy if teensy would perform as in your report... When we use BT module it is alot better but still nowhere near your results. I think we...

Typical input signal prep for ADC includes amplifying signal so max value will correspond with max input voltage to the ADC (=Vref), but the problem here is that baseline changes and it can be from 0-Vref and signal is typically only few hundreds/thousand reads modulated into baseline! So one...

I did some bare tests on Teensy 3.0 16b ADC read, hooked Teensy A10 input and Vref to lab bench PSU filter out little bit and this is how plot looks like: I'm more concerned about these spikes random high count value from mean, ugh, there is some sign of 60Hz (wire loops but that can be taken...

My first post here so i should introduce myself. My name is Robert and i work with Greg (gbathree) on the photosynq project designing the electronics. Now if you load the SCH from github you will see there is no PWM directly to the LED (since old teensy 3.0 now did not have ADC unlike 3.1 we...