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This overall strategy towards hardware debug isn't really working any more, at least for me: Teensy ≥ 3 clones always could have had significantly more functionality than authentic devices, and similar non-crippled devices from US vendors were starting to be competitive at the end of the 3.x...

I've been browsing around the Cortex documentation, and cursing the lack of a SWO pin. I did notice that it's possible for a GDB stub/RTOS to be able to suck out the payload of embedded trace messages through an integration test mode in the TPIU. See...