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  1. R

    Ideas on a T4 parallel library using FlexIO

    It's not. SDI/SQI have 2/4 bidirecional data lines while the adcs have 2 or more output data lines but only one data in line. Writing to the device is like normal SPI. Results are clocked out on multiple lines in parallel...
  2. R

    Ideas on a T4 parallel library using FlexIO

    Could you use it to sample multiple SPI data lines? I know many simultaneous sampling adcs have one output line per input, clocked out simultaneously with the clock line. It's meant for fpgas but it would cut the time used to sample multiple channels.
  3. R

    High voltage servo drive.

    I'm trying to design a high voltage servo drive using the micromod teensy(and simplefoc) for general single and 3 phase power. I'm pretty good with digital signals but I'm a bit unsure how i should handle the adcs and the gate driver side. I'm using allegro acs73002 sensors for current sense...
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