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  1. O

    What applications truly need both Teensy 3.5 / 3.6 built in DACs?

    Wouldn’t 3 DACs enable an easy VGA output with lots of colours ?
  2. O

    Generating clock signal for an 8 bits 6502 CPU

    Why did you connect PHI2 OUT? The clock signal from teensy arrives on PHI2 not PHIW OUT, which by the way is more or less deprecated on the latest 65c02.
  3. O

    Generating clock signal for an 8 bits 6502 CPU

    Hi, if it can help I just got a Teensy to drive 65C02 (WDC CMOS Version) on a breadboard. I tested it up to 1.2Mhz and it’s stable even though the duty cycle is not 50/50. I don’t use any interrupt so far, and emulate RAM, ROM and Serial. Check if it works with your NMOS, it might help identify...
  4. O

    RAM and I/O for 6502?

    Hi, just found this old post and I was wondering if you managed to get it to work at desired speed. I was working on a similar case and I got the Teensy to reach 1.2Mhz without over clocking. At 240Mhz, you can get the 6502 to run at 1.7Mhz, although I’m cheating with an asymmetrical cycle (very...