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    Very Stable DAC Output using PDB (Programmable Delay Block) and DAC Buffer

    Hi jpshea. On reset the DAC0_C1 BFMD field is set to 0 => Normal Mode => circular buffer mode. The descriptions of the modes are on page 736 of the manual.
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    Very Stable DAC Output using PDB (Programmable Delay Block) and DAC Buffer

    Thanks Jp3141. You are so right. The old off-by-one error. I believe the original code would have worked with "if (lutndx == LUT_SIZE) lutndx = 0;" (with the lutndx++ left in place). Also, I didn't realize the cast to int would round down. I learned something!
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    Very Stable DAC Output using PDB (Programmable Delay Block) and DAC Buffer

    Thanks Richard. At this time I have no need to use the ADC functionality of the chip (although I could see myself using it in the future). Just looking at the hardware registers and configuration for the ADC is pretty daunting though. There looks to be a lot of setup and calibration needed to be...
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    Very Stable DAC Output using PDB (Programmable Delay Block) and DAC Buffer

    Hello to all. This is my first post and I hope you'll go easy on me. I spent a lot of hours experimenting with the DAC and the PDB (Programmable Delay Block) to drive the DAC. Perhaps this will help someone else. The code below details the following: -Generation of extremely stable DAC...
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