Search results

You’re at a bottleneck with SPI speed wise in any case, so as slow as PSRAM is for frame rate, so is SPI. I can tell you that even with the newer RA8889 and a 16 bit parallel bus, the RA itself is just slow. @wwatson couldn’t go higher than 12Mhz on the parallel bus with DMA support Consider...

Just for the sake of it (and to show the benefit of SDRAM over PSRAM in this case) I ran the test on a T4.1 with 16MB PSRAM running at 88Mhz (I can't recall if I changed the bus frequency to 132Mhz or not) Time to copy 800*240*2 bytes from RAM1 to RAM2: 1606 uSec Time to copy 800*240*2 bytes...

I’ll be using SDRAM only for the screen sized destination buffer and a 4MB audio PCM buffer, so I’m not too worried about the wasted/untapped space

I wonder how much of a performance boost this thing would have on a Devboard v5 with SDRAM, and a full eLCDIF/FlexIO capable output for driving a display

@theboot900 how are you dividing the SDRAM into the four banks? Through the linker script? I’d like to set my destination buffer at the beginning of the second bank, but not show how with my codebase

I've done some more testing, this time with eLCDIF enabled before the PXP is started and and before a trasnfer starts PXP and eLCDIF share the destination buffer, so the eLCDIF is constantly running This affects the number a fair amount, but not too bad still.. SDRAM @ 198Mhz SDRAM init...

I wanted to add PXP (or some hardware rendering support) to LVGL in a form that is supported on the Teensy platform. LVGL does support the use of the PXP but their build code is built for MCUExpresso - and so it requires a lot of rewriting to compile on the Teensy

Yep! Plan (for now) is to use PXP to copy LVGL partial buffer data from DMAMEM to SDRAM main buffer And also copy canvas data from DMAMEM to SDRAM Will look very similar to this video - it used direct mode in LVGL to an SDRAM buffer and memcpy to copy canvas data (moving waveform) to SDRAM main...

More testing on DB5: SDRAM@133Mhz Time to copy 800*240*2 bytes from RAM1 to RAM2: 1607 uSec Time to copy 800*240*2 bytes from RAM1 to SDRAM: 8406 uSec Time to copy 800*240*2 bytes from RAM2 to SDRAM: 8405 uSec Time to copy 800*240*2 bytes from SDRAM to SDRAM: 9753 uSec Time to copy 800*480*2...

Everything is done with the PXP for this test as I am looking to see what performance I can get with async copies PXP_init(); memset(s_fb, 0, sizeof(s_fb)); memset(d_fb, 0x01, sizeof(d_fb)); memset(ext_d_fb, 0x02, sizeof(ext_d_fb)); memset(ext_s_fb, 0x03, sizeof(ext_s_fb))...

Did some initial testing with an older DBv4.5 (has the DQS cap, and can't get it to init over 133Mhz) Will try the DB5 later at 166/198/221 and see how if affects numbers Meanwhile, here is 133Mhz SDRAM, transferring 800*240*2 bytes from one buffer (RAM1/RAM2/SDRAM) to SDRAM Also did 800*480*2...

Could you run a test to measure the time it takes the pxp to copy an 800x164px block (16bpp) from DMAMEM to SDRAM as well as SDRAM to SDRAM? BTW, seems like I have the same panel as you - 7” IPS from BuyDisplay

You HAVE to purchase the bootloader chips from PJRC. This is their business model and the core to the Teensy product - if he open sources the bootloader code they will have no reason to exist as anyone could copy the Teensy and sell it as their own.

Could you share the codebase for this test? I have 7” 800*480px display with the same driver and will be hooking it up to my Devboard V5 when the adapter PCBs arrive, and have been considering use of the PXP to write rectangle clips to the main eLCDIF buffer for LVGL partial mode implementation...

Thanks Kris! I can understand the fear plugging in some wires and homemade PCBs into an expensive car. But with the CAN transceiver in place and using the universal OBD CANH/CANL signals, there is not much place to go wrong, and the possibility of damaging the CAN Gateways is very low. The...

@mjs513 can I set compareModePosition to 1 and get an interrupt every count?

So what is the actual benefit of running Zypher on a single core MCU? Task management?

Sorry, seems Mike answered that for me Appreciate the offer! For now I will just have a go with the interrupt on pin #2 with the signal from Phase A When doing this bridge between pin 0 and pin 2, should I add in any passive components, such as a diode or something to make sure there is no...

@joepasquariello thats for the detailed response! I specifically need the time delta above, so I will use the quad encoder HW to detect if there is rotation, and what the direction of rotation is, and I’ll use an interrupt on pin 2 to count time between pulses. Im using a TMM as a secondary...

Coming back to this now that I know exactly how to count the "speed" of the encoder; I need to count the time passed between each pulse on Phase A Now, I've done this using a simple IRQ method as the standard encoder lib would use I store the value in an uint16_t that starts with a max value of...

Thought it was time to share this project-turned-product with the community A small, personal gauge project of mine that started in 2019 when I had begun engine modifications on my Golf GTI brought me to realize that there was no plug and play gauge on the market back then that didn’t cost a...

You can extend with SPI bases CAN controllers

Very very cool project! What have you done with it so far? Anything interesting with the additional GPIOs and SDRAM?

Don’t confuse FlexSPI with FlexIO, which the latter is a module that can emulate several protocols and has an SPI emulation library available by @KurtE You might be able to emulate some form of 4-bit SPI with the FlexIO module, but it won’t support simultaneous writes and reads, can only do...

Do you need the Teensy to be the master of the slave? Regardless, here are two examples, one for master and one for slave, on the T4.x https://forum.pjrc.com/index.php?threads/t4-spi-dma-multiple-transactions-miso-and-mosi-are-tristate-and-one-pin.72337/page-2#post-354363

The only “new” developments to the hardware have has been the SDRAM DevBoard - But thats an open source members project sponsored by @Dogbone06 and not an official PJRC development. Some of us have done some cool things with the added SDRAM and additional GPIOs

U’s are for Unsigned, its a suffix to tell the compiler that the value is a constant unsigned int. I still urge to use the lv memory monitor. I used it to identify a memory leak a few years back that happened each time I navigated between screens.

Have you tried to increase LV_MEM_SIZE from the default 64k, to say 128k in lv_conf? Can you confirm as well that you don’t have a memory leak in your lvgl app? Is lv mem monitor enabled in the simulator? Is it enabled on your T4 build?

Thanks for the response! Is there any way to run this without the direct patch to the playSdWave()? So I can just directly feed it from a small buffer with several hundred or thousand of samples at a time? Im planning on analyzing at 48khz stereo PCM file. I first average the L+R channels...

I have a need to do some analysis on a PCM data stream from a WAV file, to create a 3-band waveform of an audio track. I'm reading the data directly from the SD card, and looping though samples. I am not playing the audio back during this analysis, and when I do, I'm not using the Audio lib at...

You can also increase data rates by increasing the SDIO clock speed from 25/50Mhz to 99Mhz on fast cards. @beermat has had good results in doing this

You’re opening and closing the file each time you call readFile - not best practice, and possibly the root cause of your app’s slowdown as it progresses Open the file once and read/write to it in your loop. When you are finally done, close it.

Reviving this thread on some new findings that I’ve made recently while trying to integrate flexio8080 with an RA8889 display controller. Testing a block transfer of 480*320px (307200 bytes), one byte at a time At 20Mhz bus speed the polling transfer takes 24ms, a DMA transfer takes 13ms At...

My biggest issue with the RA8889 (and previous versions) is they have this wait/busy pin and register indicator, and if you write too fast, the RA/SDRAM can’t handle the speed and it will assert the wait pin until it’s ready. With polling transfers you can get around this by checking a bool...

Out of curiosity, with a custom board, why did you choose PSRAM over faster SDRAM?

A. This is very cool - well done! If you need some structure for a lib (which only compiles for a Teensy Micromod, but with changes will support the T4.1) then have a peek here B. Regarding RAM - if you use the PXP, with some tricks you could get away with two small partial buffers...

@Dogbone06 was quite involved with Sparkfun around 2 years ago due to reliability issues with the NXP BGA joints coming undone from the thin, flexible PCB of the MM. They did some rework to the HW I believe to try an minimize that issue.

Seems in like with the application notes

If you’re using a smart display with a built in controller then take a look at my ILI9488 FlexIO/DMA driver for some inspiration https://github.com/david-res/ILI948x_t4_mm Ive recently purchased some 7” displays from BuyDisplay that are controlled bu an RA8889 and I am writing up a driver to...

https://github.com/david-res/eLCDIF_t4 Its setup for 16 bit color but with a few small changes will work with 24 bit

@PaulStoffregen that's not a bad idea, assuming async transfers are not needed @KurtE I assume your suggestions would only work with the variant code? No way to do this without it?

I'm building a project using DevBoard v5 (based on a Teensy Micromod schematic, with SDRAM) , and I need to access SPI instance, but the standard pins 9,10,11, 12 (B0_00, B0_01, B0_02, B0_03) are being used by the eLCDIF instance. There is a set of alternate pins I can use (B1_03, B1_05, B1_06...

@mjs513 (hope you’re feeling better!) @KurtE Is there a way to do non blocking, partial transfers without setting a dedicated frame buffer? I have two LVGL partial buffers in DMAMEM and would like to point the relevant one to the display driver, and get a callback trigger when done?

I've got the code above working successfully to output steroo audio stream to the Audio Shield But I get an interrupt on each half word, as I am also loading one channel of one sample at a time. This means at 44.1Khz sample rate, I am getting 88200 interrupts per second. Is there a way that I...

I added the CS_went_high check alongside the existing flag_transaction_completed. Its running stable on SPI1 with 12cm jumper wires if (MOSI_SNIFFER.flag_transaction_completed && MOSI_SNIFFER.CS_went_high) { // Serial.printf ("n=%d, ", n++); /* Serial.printf ("\nRECEIVED ")...

I’ve searched the forums for async UART but came up with nothing pretty much.. I need to send these 27 byte frames at a 1Khz rate If there is something you know of, I don’t mind having a look/go at it

Done more testing, but unfortunately I can't get it to work too well on my bench using SPI instance on both devices. The Slave (T4.1) looses sync from the master (DB5) after a while. I moved the slave to use SPI1, and it's MUCH more stable on the T4.1 - will let it run for a while and see it it...

Tested it out - works with an extra group in between the two Teensies But was sensitive to being powered from the same source Now, I will test with Master being a custom Teensy Dev Board v5 and the Slave a T4.1 I’ll also go 32 byte payload to round things up Thanks!

In order to avoid using custom cores to support the added pins for this project, we configured those extra pins on the MUX level, on a need to basis. So using standard Teensy APIs on the newly exposed pins for Analog,Digital,PWM etc won’t work without mods @KurtE did did some work for a Teensy...

And were you able to set the TX buffer on the slave and receive it back on the master?