In numerous postings it has been said that the limit for the Teensy ADC is substantially less than 16 and less than the performance metrics stated in the processor data sheets. However, measurements using solderless breadboards and jumper wires, are not an appropriate way to assess the performance of the ADC of the Teensy processor.
In fact the Teensy ADC really is capable of performance very close to 16 bits, if you use it correctly. In the following post, I describe a design that achieves noise levels within the last bit of the 16 bit ADC on a Teensy 3.1
https://forum.pjrc.com/threads/53173-USB-DAQ-with-the-Teensyhttp://
NXP seems to concur, and forwarded to me an application note on how to increase ADC accuracy in general, and for the ADC's in this family of processors. This can be found at
https://www.nxp.com/docs/en/application-note/AN5250.pdf
All of these recommendations are satisfied in the board that I described in the link above.
Note there that good layout is important, as well as careful part selection, circuit design and analysis.
In fact the Teensy ADC really is capable of performance very close to 16 bits, if you use it correctly. In the following post, I describe a design that achieves noise levels within the last bit of the 16 bit ADC on a Teensy 3.1
https://forum.pjrc.com/threads/53173-USB-DAQ-with-the-Teensyhttp://
NXP seems to concur, and forwarded to me an application note on how to increase ADC accuracy in general, and for the ADC's in this family of processors. This can be found at
https://www.nxp.com/docs/en/application-note/AN5250.pdf
All of these recommendations are satisfied in the board that I described in the link above.
Note there that good layout is important, as well as careful part selection, circuit design and analysis.