Advice for custom Teensy 4.x PCB?

[AxionQc]

I'm looking for some final advice before making this, Its a 6 layer ENIG PCB with Via in Pad I used the .8mm pitch 1062 with the Winbond W25Q128JVPIM for the flash.

I implemented an ESP32 Pico V3 02 for wireless and separate tasks, there are 2 solder jumpert pads for boot and rst but they are also connected to 2 teensy pins. it uses the 2450AT42E010B001E Zero Clearence antenna with its metal reference being the GND on layer 5. this is the layer stackup:

The PCB also includes JST SH 4 pins for Stemma QT usage and a JST SH 3 pin for a mic.

There is also a USB C with 5.1k resistors for input power and a XT30M for output power to HUB75 panels.

The main part is the Smartmatrix Smartled level shifting for driving HUB75 RGB panels and APA102 Strips.

There are WS2812B-2020 leds for status.

Also includes an SD card reader incase i would need one in the future.

My only concerns is the teensy portion itself and its sensitive components. Any advice, concerns or questions are welcome!

Smallest trace width is .1mm, it will be manufacted by JLCPCB

 

[AxionQc]

realized that the JST SH housing protrusions would hit each other, moved the power status led's down to where the 2x8 header is

 

[AxionQc]

Note this thread has been abandoned and replaced by a updated thread due to the large amount of changes i made and better formatting, Link