Hello All,
I've recently started a new job and have taken over a in progress project which uses Teensy 4.0 and 4.1.Boards were designed and built before I started here. We have a modular system where various boards and be stacked together. The boards and connected by simple 4 pin (long) header with power (12V) and I2C lines. The top most board is then supplied with power and then each board has its own 5V linear reg as well as 3.3 from the Teensy. So far so good.
However we have run into a problem with assembly it seems. Some times after assembling a stack (including a stack that was taken apart to add a case) and applying power all teensys in the stack are instantly dead. 3.3v line shows ~0.15v and obviously sinks a good amount of current. This seems to imply that somehow the teensy are getting more then ~3.9V on a gpio. That it happens to all teensys (and to stacks that have worked before) it would need to be the SDA or SCL line as those are the only connection between the boards.
When this first occurred I thought the pins were perhaps misaligned resulting in 12V getting on the SDA line. However in retrospect that should only effect the boards below the first, not to mention its something we check for now. I thought maybe residual voltage on the 12V line but that doesn't seem possible after checking how long the 12V line takes to decay. Sadly I never had the mind to measure the connector pins right when a stack first died.
Edit: I took a look at the startup of the 5V reg and it is infact spiking to 6 volts. It's over 5.5 for about 30us. Maybe at time spikes higher./longer It is just an 7805 and so has no softstart. May also be unrelated.....
I'm at a bit of a loss at this point as to how the teensy might be getting an overvoltage. Is there another failure mode I'm just to blind to see...
I've thought about adding some overvoltage protection to the top board but I'd like to be sure that this is actually the problem.
I've attached the layout and schematic of the upper board, as well as a photo showing a stack. Normally there are of course standoffs between the boards to avoid contact.
I've recently started a new job and have taken over a in progress project which uses Teensy 4.0 and 4.1.Boards were designed and built before I started here. We have a modular system where various boards and be stacked together. The boards and connected by simple 4 pin (long) header with power (12V) and I2C lines. The top most board is then supplied with power and then each board has its own 5V linear reg as well as 3.3 from the Teensy. So far so good.
However we have run into a problem with assembly it seems. Some times after assembling a stack (including a stack that was taken apart to add a case) and applying power all teensys in the stack are instantly dead. 3.3v line shows ~0.15v and obviously sinks a good amount of current. This seems to imply that somehow the teensy are getting more then ~3.9V on a gpio. That it happens to all teensys (and to stacks that have worked before) it would need to be the SDA or SCL line as those are the only connection between the boards.
When this first occurred I thought the pins were perhaps misaligned resulting in 12V getting on the SDA line. However in retrospect that should only effect the boards below the first, not to mention its something we check for now. I thought maybe residual voltage on the 12V line but that doesn't seem possible after checking how long the 12V line takes to decay. Sadly I never had the mind to measure the connector pins right when a stack first died.
Edit: I took a look at the startup of the 5V reg and it is infact spiking to 6 volts. It's over 5.5 for about 30us. Maybe at time spikes higher./longer It is just an 7805 and so has no softstart. May also be unrelated.....
I'm at a bit of a loss at this point as to how the teensy might be getting an overvoltage. Is there another failure mode I'm just to blind to see...
I've thought about adding some overvoltage protection to the top board but I'd like to be sure that this is actually the problem.
I've attached the layout and schematic of the upper board, as well as a photo showing a stack. Normally there are of course standoffs between the boards to avoid contact.
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