Any Chance of a Teensy ++ 3.1?
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Theremingenieur
Senior Member+
... and I'm needing the second DAC. It would be great to have already a (more or less definitive) pinout diagram which would allow me to try to do a PCB layout which could for instance accept a Teensy 3.1 and later a ++ (with perhaps a few jumpers) so that upgrading existing devices could be done within minutes.
Not sure if Paul will be able to do that or not, its most likely going to be a lot of routing spaghetti. And he may not even be ready to give us details like that since they may have to change later on.
Early October Paul wrote
He has not responded since to update stimuli, so we must simply accept that new high-power Teensy will not come soon.
I hope Paul does not run into a burn-out syndrome with all the parallel activities we expect from him.
and
He has not responded since to update stimuli, so we must simply accept that new high-power Teensy will not come soon.
I hope Paul does not run into a burn-out syndrome with all the parallel activities we expect from him.
Theremingenieur
Senior Member+
ok, I'll stop asking.
I didn't think that it would still take so much time and I feel actually frustrated. When I saw the first code for the MK66 show up in the core libraries, I concluded for myself that it was only a question of weeks until first boards would be available for testing and decided to move my project strategy towards it. I'll most probably have to make a step backwards now since I announced a teensy-based product for March 2016 and can't realize all planned features with the teensy 3.2.
It is difficult for me to accept that "accessories" like the audio library and its (I admit, it's nice!) visual design tool or a "prop shield" (even don't know what that is) might have a higher priority and a broader market than more powerful integrated hardware, but that's obviously my faulty personal point of view.
I didn't think that it would still take so much time and I feel actually frustrated. When I saw the first code for the MK66 show up in the core libraries, I concluded for myself that it was only a question of weeks until first boards would be available for testing and decided to move my project strategy towards it. I'll most probably have to make a step backwards now since I announced a teensy-based product for March 2016 and can't realize all planned features with the teensy 3.2.
It is difficult for me to accept that "accessories" like the audio library and its (I admit, it's nice!) visual design tool or a "prop shield" (even don't know what that is) might have a higher priority and a broader market than more powerful integrated hardware, but that's obviously my faulty personal point of view.
defragster
Senior Member+
+1@Paul, keep calm and may the force be with you
Theremingenieur - are you needing more power/speed/FPU/RAM/CODE? Or more I/O? That's the double-edge with pre-announcing, unlike the LC that seemed to just dropped when ready, and was no doubt a world simpler to implement.
I'll buy some T_3.x++'s for the excitement of more processing power - and that may spoil my appreciation of the T_3.2's apparent power - though the the T_3.2 will most often win for the size and my projects so far don't look to be I/O intensive beyond T_3.2. What I need is a (self aware) radio - so added size from an ESP8266 still needed.
..and i decided to make a *very* ambitious project that will take a looong time.. it can wait one, two, three or more months.
lol, i *STILL* hav'nt my current long-term-project flawlessly running (evry time i try work on it, i get distracted by very intersting forum-challenges (like the display or (most recent) a good SID emulationand soon C64 emulation (cpu+sound only))
..edit: But it would be good to know a rough timetable.
lol, i *STILL* hav'nt my current long-term-project flawlessly running (evry time i try work on it, i get distracted by very intersting forum-challenges (like the display or (most recent) a good SID emulationand soon C64 emulation (cpu+sound only))
..edit: But it would be good to know a rough timetable.
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Theremingenieur
Senior Member+
defragster - all I'm needing for my project is just a second integrated DAC and at least 2 channels of each of at least 3 FTMs on through-hole pin headers at the edges, so that I can use one FTM for measuring pulse widths at high speed/resolution using FreqMeasureMulti, and the 2 other FTMs for outputting PWM at different resolutions and speeds, using a standard IC socket for the Teensy board. No need for more speed although that would be nice, nor for the FPU.
My goal is to have most of the hardware integrated instead of glueing shields together. The peripheral board should remain simple, having some voltage regulation and a few op-amps. One of my ideas is that potential clients will be able to build the peripheral board as a kit or so, so that I'd only to sell the pre-programmed Teensys. I'm not very interested in building the stuff around.
My goal is to have most of the hardware integrated instead of glueing shields together. The peripheral board should remain simple, having some voltage regulation and a few op-amps. One of my ideas is that potential clients will be able to build the peripheral board as a kit or so, so that I'd only to sell the pre-programmed Teensys. I'm not very interested in building the stuff around.
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PaulStoffregen
Well-known member
Ok, here's one reply to several recent messages.....
Both DAC outputs are a top priority, and pretty easy routing-wise.
Well, that all depends on your definition of "soon".
Please keep in mind Teensy-LC was in various states of planning and design for well over a year. Even the relatively simple 3.1 to 3.2 change involved several months.
I'm really sorry it's turned out to be frustrating. That's really the last thing I wanted.
This is why I generally don't discuss "vapor".
It should be no secret my time has been spread pretty thin lately. Through most of October and November, a *lot* of work went into improvements which hardly anyone will ever notice (but they make a huge difference in how we run this little company). Recently there's been unexpected issues with the Prop Shield, which I'd hoped to have in production at this point. The old saying "everything takes longer than anticipated" is so very true!
We're going to do this in a couple early access stages. Frank, you'll absolutely be in the first group! Like we did with Teensy-LC, we're going to give forum contributors early access. Unlike Teensy-LC, we're considering making some very early protos, not in the final form factor, which will use the big LQPF144 chip (so we can hand solder them). How many early boards we'll make is still very up in the air right now. The worst thing anyone can do to request them is post a "me too" request. If you've read this part, in the middle of this lengthy message, please don't amplify. Just follow this thread. If you're feeling anxiety... just remember how we handled Teensy-LC.
Regarding time frames, I do hope you can see how difficult this situation is for me, where everyone wants time estimates, but there's tremendous frustration about the lengthy time frame and very likely delays. This is why I generally don't mention new stuff until it's about to ship. I can tell you delays are to be expected. Every other Teensy took a lot longer than expected, so this one that's far more complex than any prior models isn't going to happen quickly.
The pinout isn't 100% finalized, but it absolutely will the same 28 pins Teensy 3.2 has, and it absolutely will have both DAC pins, and it absolutely will have all pins necessary for RMII ethernet, and another GND and 3.3V pin are also on the high priority list. The plan is a 48 pin DIP form factor, so those DAC and RMII and power pins account for several of the 20 new pins.
The 28 pins on Teensy 3.2 already give access to all the channels for FTM0,1,2. If you compare Kinetis reference manuals, you'll see 4 of the 8 channels from FTM3 are also within with original Teensy 3.2 pinout. Getting the other 4 FTM3 channels is planned. So are a number of other "nice to have" features. But I'm not going to absolutely commit until I have personally done at least a simple test with real hardware on all those features.
Both DAC outputs are a top priority, and pretty easy routing-wise.
Well, that all depends on your definition of "soon".
Please keep in mind Teensy-LC was in various states of planning and design for well over a year. Even the relatively simple 3.1 to 3.2 change involved several months.
I'm really sorry it's turned out to be frustrating. That's really the last thing I wanted.
This is why I generally don't discuss "vapor".
It should be no secret my time has been spread pretty thin lately. Through most of October and November, a *lot* of work went into improvements which hardly anyone will ever notice (but they make a huge difference in how we run this little company). Recently there's been unexpected issues with the Prop Shield, which I'd hoped to have in production at this point. The old saying "everything takes longer than anticipated" is so very true!
We're going to do this in a couple early access stages. Frank, you'll absolutely be in the first group! Like we did with Teensy-LC, we're going to give forum contributors early access. Unlike Teensy-LC, we're considering making some very early protos, not in the final form factor, which will use the big LQPF144 chip (so we can hand solder them). How many early boards we'll make is still very up in the air right now. The worst thing anyone can do to request them is post a "me too" request. If you've read this part, in the middle of this lengthy message, please don't amplify. Just follow this thread. If you're feeling anxiety... just remember how we handled Teensy-LC.
Regarding time frames, I do hope you can see how difficult this situation is for me, where everyone wants time estimates, but there's tremendous frustration about the lengthy time frame and very likely delays. This is why I generally don't mention new stuff until it's about to ship. I can tell you delays are to be expected. Every other Teensy took a lot longer than expected, so this one that's far more complex than any prior models isn't going to happen quickly.
The pinout isn't 100% finalized, but it absolutely will the same 28 pins Teensy 3.2 has, and it absolutely will have both DAC pins, and it absolutely will have all pins necessary for RMII ethernet, and another GND and 3.3V pin are also on the high priority list. The plan is a 48 pin DIP form factor, so those DAC and RMII and power pins account for several of the 20 new pins.
The 28 pins on Teensy 3.2 already give access to all the channels for FTM0,1,2. If you compare Kinetis reference manuals, you'll see 4 of the 8 channels from FTM3 are also within with original Teensy 3.2 pinout. Getting the other 4 FTM3 channels is planned. So are a number of other "nice to have" features. But I'm not going to absolutely commit until I have personally done at least a simple test with real hardware on all those features.
MichaelMeissner
Senior Member+
I know how hard it is to bring out new hardware, and that things always pop up.
And in general, any time you publish a timetable, it is an invitation to the universe to mess with you. I still marvel at what all you do, particularly with new Arduino releases, and having to do a presentation on the audio card and library.
In my day job, we recently had a very tight dance between the GCC 6.0 feature freeze, the schedules for the major Linux distributions that we care about, new hardware that won't be available for some time but which we needed to get support into GCC 6 or have to wait a year to get it in GCC 7.
My personal opinion is that the LC and the audio shield libraries may be more important than the Teensy 3.x++ for the total market, as these are things that bring in new users. Since I don't know much about the prop shield, I can't say how useful it is, but it too may bring in new users. Yes, the new chip is very important for a subset of the people, but not everybody are at the edges of either performance or I/O buses and pins that are willing to pay the higher cost. Particularly, you don't want to ignore the low end of the market, particularly with the new M0 boards coming out Arduino Zero, Adafruit Feather M0, etc. It is always a balancing act.
And in general, any time you publish a timetable, it is an invitation to the universe to mess with you. I still marvel at what all you do, particularly with new Arduino releases, and having to do a presentation on the audio card and library.
In my day job, we recently had a very tight dance between the GCC 6.0 feature freeze, the schedules for the major Linux distributions that we care about, new hardware that won't be available for some time but which we needed to get support into GCC 6 or have to wait a year to get it in GCC 7.
My personal opinion is that the LC and the audio shield libraries may be more important than the Teensy 3.x++ for the total market, as these are things that bring in new users. Since I don't know much about the prop shield, I can't say how useful it is, but it too may bring in new users. Yes, the new chip is very important for a subset of the people, but not everybody are at the edges of either performance or I/O buses and pins that are willing to pay the higher cost. Particularly, you don't want to ignore the low end of the market, particularly with the new M0 boards coming out Arduino Zero, Adafruit Feather M0, etc. It is always a balancing act.
Theremingenieur
Senior Member+
I apparently missed something. For me, the FTM2 pins were on pin 25 and 32 and thus not easily accessible. If someone knew how to "switch them over" somewhere to the "outer" pins, it would be of great help for me.
PaulStoffregen
Well-known member
I'm a bit reluctant to go into highly specific pinout details. If the pinout does change for the final release, posting details now is only going to cause even more frustration!
With that caveat in mind, let me assure you I have indeed put a tremendous amount of time into prioritizing which signals will route to the 48 outside pins. There are a large number of things people will want to do with the pins. I want to support as many applications as possible.
About your specific question, on the bottom side of Teensy 3.2 are 12 signals.... my current plan is to route 7 of those to the new 20 outside pins. Those seven are pins 24, 25, 27, 28, 29, 30, 32 on Teensy 3.2. All 7 of these are fairly high priority, for various reasons. They'll become different pin numbers on the new board. Unless something changes (and *all* of this may change), pins 26, 31, 33, A12, A13 from Teensy 3.2 will not to be routed to the outside.
With so many pins on the chip and so few on the outside edge, obviously some trade-offs have to made. We can't have everything. Let me give you some idea of the things to NOT expect. Only 5 of the 6 serial ports will likely make it to the outside 48 pins, and none of the RTS/CTS handshakes for the 3 new ports (maybe a couple, but plan on handshaking for only the first 3 serial ports). Likewise, expect only 2 of the 3 SPI ports, and only 3 of the 4 I2C ports. Many external bus signals won't be accessible, so the door will be closed to adding a SDRAM chip. I had also really wanted to get all 16 low bits of a 32 bit port to support 16 bit LCDs and a true 16 bit version of OctoWS2811, but unfortunately that is looking very unlikely.
Again I want to emphasize how providing info and not providing info both lead to frustration. In hindsight, I probably should have refused to comment at all until beta testing. I'm trying to manage a difficult balance here, to give you some good info, but to avoid making more statements now which will only make frustration levels even worse in a matter of weeks or months.
With that caveat in mind, let me assure you I have indeed put a tremendous amount of time into prioritizing which signals will route to the 48 outside pins. There are a large number of things people will want to do with the pins. I want to support as many applications as possible.
About your specific question, on the bottom side of Teensy 3.2 are 12 signals.... my current plan is to route 7 of those to the new 20 outside pins. Those seven are pins 24, 25, 27, 28, 29, 30, 32 on Teensy 3.2. All 7 of these are fairly high priority, for various reasons. They'll become different pin numbers on the new board. Unless something changes (and *all* of this may change), pins 26, 31, 33, A12, A13 from Teensy 3.2 will not to be routed to the outside.
With so many pins on the chip and so few on the outside edge, obviously some trade-offs have to made. We can't have everything. Let me give you some idea of the things to NOT expect. Only 5 of the 6 serial ports will likely make it to the outside 48 pins, and none of the RTS/CTS handshakes for the 3 new ports (maybe a couple, but plan on handshaking for only the first 3 serial ports). Likewise, expect only 2 of the 3 SPI ports, and only 3 of the 4 I2C ports. Many external bus signals won't be accessible, so the door will be closed to adding a SDRAM chip. I had also really wanted to get all 16 low bits of a 32 bit port to support 16 bit LCDs and a true 16 bit version of OctoWS2811, but unfortunately that is looking very unlikely.
Again I want to emphasize how providing info and not providing info both lead to frustration. In hindsight, I probably should have refused to comment at all until beta testing. I'm trying to manage a difficult balance here, to give you some good info, but to avoid making more statements now which will only make frustration levels even worse in a matter of weeks or months.
Constantin
Well-known member
On the one hand, I can see why folk are anxious to get a new board. On the other hand, developing one isn't easy at all. I suggest to everyone hounding Paul to cool it. You don't want him to go down the path of the DUE and deliver a half-baked product just to meet a timetable. Some things take time. Like my DAQ system... two years and counting.
MichaelMeissner
Senior Member+
If you haven't seen it yet, FrankB designed a protoboard that you can solder to the Teensy 3.2/3.1/3.0 to bring out the 10 pads underneath the Teensy. I've ordered it from OSH park ($3.45 for 3 boards), but I haven't actually soldered it together yet: https://oshpark.com/shared_projects/cYQjHdCu.
Theremingenieur
Senior Member+
I just discovered that there are many breakout boards for the teensy on oshpark, thank you for that hint, MichaelMeissner. I'll take some time over the Xmas holidays to think about another way to get rid of the need for FTM2 whose pins are only underneath. If not, this is definitively a way to go.
defragster
Senior Member+
There is a thread or two around with the boards listed and detailed to some degree - there is FrankB's little one and a longer "Teensy 3.2 Breakout Board R3 copy" for the T_3.2 and prior for the T_3.1 - I got some of both of those unused yet.
A short summary link to links here : https://forum.pjrc.com/threads/28866-Wiki-Coming-Please-link-worthy-posts
A short summary link to links here : https://forum.pjrc.com/threads/28866-Wiki-Coming-Please-link-worthy-posts
There is more to Teensy than the newbie can (practically) know. Sorely need Wiki or some such to be a collection and focal point.
defragster
Senior Member+
stevech - Pretty sure I saw that comment posted somewhere before ;-) A Wiki would be so much more searchable than the forum too.
Even that "06-10-2015 Wiki-Coming-Please-link-worthy-posts" Sticky thread linked in p#468 is not easy to scan for all the links/commentary there as it has no inherent order - just prepping links.
How long until NXP starts culling ARM processors to merge LPCs and Kenitis to reduce overlap? Could be a slow process. Or not, to reduce recurring costs.
Pity Atmel SAMs, when MCHP gets done with the thrashing.
ST is cruising.
How could I have missed that, I look nearly daily the core files for hints like this! Seems, I'm not alone.
OK, Paul once said (couple of month ago) these define could change anytime.
Edit, now I understand, commit was only 27 minutes ago
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PaulStoffregen
Well-known member
I can neither confirm nor deny anything!
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