Assistance Needed

Boran Baypğlu

Boran Baypğlu

Active member
Hello , i recently made an schematic on EasyEDA for using an Arduino Mega LCD with Teensy 4.1 without wiring mess.
i spotted some level shifters on Mega LCD , probably to convert 3.3V LCD logic to 5V so it is compatible with Arduino Mega but it is not helpful in my case , i probaby can feed they with 3.3V until i spotted AMS1117 for converting 5V to 3.3V and theys need some headroom to work with so i decided to make an PCB with level shifters.

However i am not sure it will blow my Teensy up or it just work or not so i decided to ask somebody experienced

LCD i use https://tr.aliexpress.com/item/1005003752743978.html?spm=a2g0o.productlist.main.13.739eJhtLJhtLAA&algo_pvid=57cf8c22-499f-48cc-a407-fab0aea7c63c&algo_exp_id=57cf8c22-499f-48cc-a407-fab0aea7c63c-12&pdp_ext_f={"order":"9","eval":"1","fromPage":"search"}&pdp_npi=6@dis!TRY!725.92!461.51!!!16.39!10.42!@211b612517600250490258302ecd79!12000028323893645!sea!TR!0!ABX!1!0!n_tag:-29910;d:e8898f07;m03_new_user:-29895;pisId:5000000187448306&curPageLogUid=Xkx9PkdKWFmk&utparam-url=scene:search|query_from:|x_object_id:1005003752743978|_p_origin_prod:


Sorry for mess on my scheme and my username has typo that i cant edit
 

Attachments

  • MegaTeensy.zip
    210.3 KB · Views: 19
in case you dont have EasyEDA or other such software to view my scheme , theres the PDF:

Also again , sorry for the mess.
 

Attachments

  • TeensyMega.pdf
    241 KB · Views: 24
Looking at the PDF, none of the Teensy power and GND pins seem to be connected. Even if this circuitry gets completely separate power and Teensy is powered by USB, you still need to have the grounds connected.

1760196288671.png
 
You have signals on both sides of the level shifters labeled the same. That will cause EasyEDA to connect them together on the PCB. Use different names like BUS0 and BUS0_5V to separate the 3V bus from the 5V bus.

1760390024111.png
 
What is the reason for using this transistor and resistor?

1760394786004.png


As drawn, I don't see how this can even work. When the transistor is conducting, the DIR signal gets a weak pullup. But I don't see anything that causes it to be come logic low at other times. Did I miss something?

This DIR signal also sees to connect to the VCCA pin on U13, which makes no sense (at least to me). If that was an intentional choice, maybe try explaining what you're hoping to accomplish.
 
U8 pin 13 GND is pulled to GND thru 10k Ohm resistor. U8 pin13 should tie directly to GND just like U9.
 
I don't see any power supply decoupling capacitors.

Typically you would place a 0.1uF capacitor physically close to each chip, connected between VCC and GND. For these level translator chips, you should use 2 capacitors, one between VCCA and GND, the other between VCCB and GND. Normally they are placed as reasonably close and the wires kept as short as practical. The capacitor supply very short bursts of current the chips need when they switch logic states, without requiring high bandwidth current to flow through the relatively long wires back to the power supply source.
 
Ceramic MLCC 100nF caps are pretty standard, they have low inductance. Surface mount are best if you can manage it (1206 aren't hard to solder really). Keep them close to the supply pin of the chip they serve (within a few mm) for a reliable board. At the speeds these chips switch even 20mm of PCB trace looks like an inductor.
 
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