BBenj
Member
Hello
I began to "play" with my Teensy 3.0 board today, directly with FlexTimers...
I found a solution to have a AVR-like ISR() macro which doesn't appears to be implemented in Teensyduino for now. Actually it's the AVR ISR macro itself...
I just pasted the macro from avr-libc to mk20dx128.h (just before the isr functions prototypes):
Use the ISR() macro with the isr functions names (defined in mk20dx128.h, and just below for convenience), for example:
Tested successfully with ftm0 and ftm1.
Have fun with Teensy
***
And just a tip for anyone using the FlexTimers, you need to write 0 in FTM0_SC before writing to FTM0_MOD, otherwise FTM0_MOD will not be updated (stay at 0xBFFF for me). I spent some time to find that...
***
Here is the list of Teensy 3.0 ISRs:
I began to "play" with my Teensy 3.0 board today, directly with FlexTimers...
I found a solution to have a AVR-like ISR() macro which doesn't appears to be implemented in Teensyduino for now. Actually it's the AVR ISR macro itself...
I just pasted the macro from avr-libc to mk20dx128.h (just before the isr functions prototypes):
Code:
#ifdef __cplusplus
# define ISR(vector, ...) \
extern "C" void vector (void) __attribute__ ((signal,__INTR_ATTRS)) __VA_ARGS__; \
void vector (void)
#else
# define ISR(vector, ...) \
void vector (void) __attribute__ ((signal,__INTR_ATTRS)) __VA_ARGS__; \
void vector (void)
#endif
Use the ISR() macro with the isr functions names (defined in mk20dx128.h, and just below for convenience), for example:
Code:
ISR(ftm0_isr)
{
FTM0_SC &= ~FTM_SC_TOF;
digitalWrite(13, state ^= HIGH);
}
Tested successfully with ftm0 and ftm1.
Have fun with Teensy
***
And just a tip for anyone using the FlexTimers, you need to write 0 in FTM0_SC before writing to FTM0_MOD, otherwise FTM0_MOD will not be updated (stay at 0xBFFF for me). I spent some time to find that...
***
Here is the list of Teensy 3.0 ISRs:
Code:
nmi_isr, // 2 ARM: Non-maskable Interrupt (NMI)
hard_fault_isr, // 3 ARM: Hard Fault
memmanage_fault_isr, // 4 ARM: MemManage Fault
bus_fault_isr, // 5 ARM: Bus Fault
usage_fault_isr, // 6 ARM: Usage Fault
fault_isr, // 7 --
fault_isr, // 8 --
fault_isr, // 9 --
fault_isr, // 10 --
svcall_isr, // 11 ARM: Supervisor call (SVCall)
debugmonitor_isr, // 12 ARM: Debug Monitor
fault_isr, // 13 --
pendablesrvreq_isr, // 14 ARM: Pendable req serv(PendableSrvReq)
systick_isr, // 15 ARM: System tick timer (SysTick)
dma_ch0_isr, // 16 DMA channel 0 transfer complete
dma_ch1_isr, // 17 DMA channel 1 transfer complete
dma_ch2_isr, // 18 DMA channel 2 transfer complete
dma_ch3_isr, // 19 DMA channel 3 transfer complete
dma_error_isr, // 20 DMA error interrupt channel
unused_isr, // 21 DMA --
flash_cmd_isr, // 22 Flash Memory Command complete
flash_error_isr, // 23 Flash Read collision
low_voltage_isr, // 24 Low-voltage detect/warning
wakeup_isr, // 25 Low Leakage Wakeup
watchdog_isr, // 26 Both EWM and WDOG interrupt
i2c0_isr, // 27 I2C0
spi0_isr, // 28 SPI0
i2s0_tx_isr, // 29 I2S0 Transmit
i2s0_rx_isr, // 30 I2S0 Receive
uart0_lon_isr, // 31 UART0 CEA709.1-B (LON) status
uart0_status_isr, // 32 UART0 status
uart0_error_isr, // 33 UART0 error
uart1_status_isr, // 34 UART1 status
uart1_error_isr, // 35 UART1 error
uart2_status_isr, // 36 UART2 status
uart2_error_isr, // 37 UART2 error
adc0_isr, // 38 ADC0
cmp0_isr, // 39 CMP0
cmp1_isr, // 40 CMP1
ftm0_isr, // 41 FTM0
ftm1_isr, // 42 FTM1
cmt_isr, // 43 CMT
rtc_alarm_isr, // 44 RTC Alarm interrupt
rtc_seconds_isr, // 45 RTC Seconds interrupt
pit0_isr, // 46 PIT Channel 0
pit1_isr, // 47 PIT Channel 1
pit2_isr, // 48 PIT Channel 2
pit3_isr, // 49 PIT Channel 3
pdb_isr, // 50 PDB Programmable Delay Block
usb_isr, // 51 USB OTG
usb_charge_isr, // 52 USB Charger Detect
tsi0_isr, // 53 TSI0
mcg_isr, // 54 MCG
lptmr_isr, // 55 Low Power Timer
porta_isr, // 56 Pin detect (Port A)
portb_isr, // 57 Pin detect (Port B)
portc_isr, // 58 Pin detect (Port C)
portd_isr, // 59 Pin detect (Port D)
porte_isr, // 60 Pin detect (Port E)
software_isr, // 61 Software interrupt