Call to arms | Teensy + SDRAM = true

Indeed that's incorrect. 3 sources are selected by 2 muxes. See the clock tree diagram in the reference manual.
That is what is in the PSRAM test code AFAIK - but I don't want that - I was looking to get the current SDRAM speed value to show

While I was away a run with three sequential calls to the PRand tester using three of the prior seed values at 198 MHz (which has yet to fail) :
PseudoRand(1) Seed 1438200953 with readRepeat 2000 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 622.55 with Error Cnt 0
All memory tests passed :)

PseudoRand(22) Seed 4036891097 with readRepeat 2000 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 622.56 with Error Cnt 0
All memory tests passed :)

PseudoRand(42) Seed 1427530695 with readRepeat 2000 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 622.57 with Error Cnt 0
All memory tests passed :)
 
Ok got my board - really nice - bigger than I thought it was going to be. :)

1. Plugged it in - started blinking right away
2. ran the my initial library test sketch with the library set up with c29 still present and original timing - need to do this step by step.
Code:
SDRAM Init Experiment
:-)

 SDRAM Memory 32 bit Write Start, Start Address 0x80000000, Data Length 4096 !
    SDRAM Memory 32 bit Write Time (uS) 62

 SDRAM Read 32 bit Data Start, Start Address 0x80000000, Data Length 4096 !
    SDRAM Memory 32 bit Read Time (uS) 171

 SDRAM 32 bit Data Write and Read Compare Start!
    SDRAM Memory 32 bit R/W Time (uS) 28
 SDRAM 32 bit Data Write and Read Compare Succeed!

 SDRAM Memory 16 bit Write Start, Start Address 0x80000000, Data Length 4096 !
    SDRAM Memory 16 bit Write Time (uS) 21
 SDRAM Read 16 bit Data Start, Start Address 0x80000000, Data Length 4096 !

 SDRAM Memory 16 bit Read Time (uS) 14
 SDRAM 16 bit Data Write and Read Compare Start!
     SDRAM Memory 16 bit Read/Write Time (uS) 27
 SDRAM 16 bit Data Write and Read Compare Succeed!

 SDRAM Memory 8 bit Write Start, Start Address 0x80000000, Data Length 4096 !
    SDRAM Memory 8 bit Write Time (uS) 27
 SDRAM Read 8 bit Data Start, Start Address 0x80000000, Data Length 4096 !
    SDRAM Memory 8 bit Read Time (uS) 20
 SDRAM 8 bit Data Write and Read Compare Start!

 SDRAM 8 bit Data Write and Read Compare Succeed!
    SDRAM Memory 8 bit Read/Write Time (uS) 31
 SDRAM Example End.

3. Tried my extsdram test and bricked the board. Held the boot button down 11 seconds (restore) and restored into blink sketch no issue.

Now for debugging but its dinner time here so get something to eat first :)
 
I had to revert the MPU config for now in the official core library. It causes the Wire library to crash. Yes, I know that's weird and I don't (so far) have any idea why. But with an official 1.59 release "soon", I can't keep this in for 1.59.
 
I had to revert the MPU config for now in the official core library. It causes the Wire library to crash. Yes, I know that's weird and I don't (so far) have any idea why. But with an official 1.59 release "soon", I can't keep this in for 1.59.
That is strange - I2C was next on the list to test......

Anyways. Using my EXTSDRAM kludge to the core:
Code:
EXTMEM Memory Test, 32 Mbyte
testing with fixed pattern 5A698421
testing with pseudo-random sequence, seed=2976674124
testing with pseudo-random sequence, seed=1438200953
testing with pseudo-random sequence, seed=3413783263
testing with pseudo-random sequence, seed=1900517911
testing with pseudo-random sequence, seed=1227909400
testing with pseudo-random sequence, seed=276562754
testing with pseudo-random sequence, seed=146878114
testing with pseudo-random sequence, seed=615545407
testing with pseudo-random sequence, seed=110497896
testing with pseudo-random sequence, seed=74539250
testing with pseudo-random sequence, seed=4197336575
testing with pseudo-random sequence, seed=2280382233
testing with pseudo-random sequence, seed=542894183
testing with pseudo-random sequence, seed=3978544245
testing with pseudo-random sequence, seed=2315909796
testing with pseudo-random sequence, seed=3736286001
testing with pseudo-random sequence, seed=2876690683
testing with pseudo-random sequence, seed=215559886
testing with pseudo-random sequence, seed=539179291
testing with pseudo-random sequence, seed=537678650
testing with pseudo-random sequence, seed=4001405270
testing with pseudo-random sequence, seed=2169216599
testing with pseudo-random sequence, seed=4036891097
testing with pseudo-random sequence, seed=1535452389
testing with pseudo-random sequence, seed=2959727213
testing with pseudo-random sequence, seed=4219363395
testing with pseudo-random sequence, seed=1036929753
testing with pseudo-random sequence, seed=2125248865
testing with pseudo-random sequence, seed=3177905864
testing with pseudo-random sequence, seed=2399307098
testing with pseudo-random sequence, seed=3847634607
testing with pseudo-random sequence, seed=27467969
testing with pseudo-random sequence, seed=520563506
testing with pseudo-random sequence, seed=381313790
testing with pseudo-random sequence, seed=4174769276
testing with pseudo-random sequence, seed=3932189449
testing with pseudo-random sequence, seed=4079717394
testing with pseudo-random sequence, seed=868357076
testing with pseudo-random sequence, seed=2474062993
testing with pseudo-random sequence, seed=1502682190
testing with pseudo-random sequence, seed=2471230478
testing with pseudo-random sequence, seed=85016565
testing with pseudo-random sequence, seed=1427530695
testing with pseudo-random sequence, seed=1100533073
testing with fixed pattern 55555555
testing with fixed pattern 33333333
testing with fixed pattern 0F0F0F0F
testing with fixed pattern 00FF00FF
testing with fixed pattern 0000FFFF
testing with fixed pattern AAAAAAAA
testing with fixed pattern CCCCCCCC
testing with fixed pattern F0F0F0F0
testing with fixed pattern FF00FF00
testing with fixed pattern FFFF0000
testing with fixed pattern FFFFFFFF
testing with fixed pattern 00000000
 test ran for 48.02 seconds
All memory tests passed :-)

and:
Code:
SDRAM Init Experiment
:-)
    SDRAM Memory 32 bit Write Time (uS) 61
    SDRAM Memory 32 bit Read Time (uS) 168

 SDRAM 32 bit Data Write and Read Compare Start!
    SDRAM Memory 32 bit R/W Time (uS) 28
 SDRAM 32 bit Data Write and Read Compare Succeed!
    SDRAM Memory 16 bit Write Time (uS) 46
 SDRAM Memory 16 bit Read Time (uS) 87
 SDRAM 16 bit Data Write and Read Compare Start!
     SDRAM Memory 16 bit Read/Write Time (uS) 28
 SDRAM 16 bit Data Write and Read Compare Succeed!

 SDRAM Memory 8 bit Write Start, Start Address 0x80000000, Data Length 4096 !
    SDRAM Memory 8 bit Write Time (uS) 21    SDRAM Memory 8 bit Read Time (uS) 45
 SDRAM 8 bit Data Write and Read Compare Start!

 SDRAM 8 bit Data Write and Read Compare Succeed!
    SDRAM Memory 8 bit Read/Write Time (uS) 31
 SDRAM Example End.
 
Very cool @mjs513 - yes it is a handy large size like ATP carrier for T_MM.

Here is the CAP test version @PaulStoffregen suggested - here 5,000 reads in 26 minutes on one seed - then picked two others:
PseudoRand(1) Seed 1438200953 with readRepeat 5000 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 1559.12 with Error Cnt 0
All memory tests passed :)

PseudoRand(22) Seed 4036891097 with readRepeat 5000 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 1559.13 with Error Cnt 0
All memory tests passed :)

PseudoRand(42) Seed 1427530695 with readRepeat 5000 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 1559.13 with Error Cnt 0
All memory tests passed :)
 
@PaulStoffregen
Just tested i2c as well with a Teensy 4.1 and a Regular Teensy Micromod and the sdram board. Seems to work for the TMM type boards but not the Teensy 4.1. Even moded the T41 loader to have the SDRAM region defined. Definitely strange. Just put an ifdef around for our test.

Will have to try SPI as well :) or did you try that already?
 
Here is the current CAP TEST sketch output - this ran through all 44 Psuedo Rand Seed's and did 100 repeat full 32MB reads (comparing same copy in top and bottom 16MB). No Errors here of course.

Writes 16MB to both halves then compares to each other - then does read compare against the calculated PsuedoRand math one more time before exit. Could have a UI to do short or long test number or reads and number of the 44 PRand seeds.

SUCCESS sdram.init()
Compile Time:: T:\T_Drive\tCode\RAM\CapReadSDRAM\CapReadSDRAM.ino Dec 29 2023 15:02:27
EXTMEM Memory Test, 32 Mbyte begin, 80000000 middle, 81000000 end, 82000000
PseudoRand(0) Seed 2976674124 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(1) Seed 1438200953 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(2) Seed 3413783263 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(3) Seed 1900517911 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(4) Seed 1227909400 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(5) Seed 276562754 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(6) Seed 146878114 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(7) Seed 615545407 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(8) Seed 110497896 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(9) Seed 74539250 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(10) Seed 4197336575 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(11) Seed 2280382233 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(12) Seed 542894183 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(13) Seed 3978544245 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(14) Seed 2315909796 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(15) Seed 3736286001 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(16) Seed 2876690683 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(17) Seed 215559886 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(18) Seed 539179291 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(19) Seed 537678650 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(20) Seed 4001405270 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(21) Seed 2169216599 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(22) Seed 4036891097 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(23) Seed 1535452389 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(24) Seed 2959727213 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(25) Seed 4219363395 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(26) Seed 1036929753 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(27) Seed 2125248865 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(28) Seed 3177905864 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(29) Seed 2399307098 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(30) Seed 3847634607 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(31) Seed 27467969 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(32) Seed 520563506 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(33) Seed 381313790 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(34) Seed 4174769276 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(35) Seed 3932189449 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(36) Seed 4079717394 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(37) Seed 868357076 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(38) Seed 2474062993 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(39) Seed 1502682190 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(40) Seed 2471230478 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(41) Seed 85016565 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(42) Seed 1427530695 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
PseudoRand(43) Seed 1100533073 with readRepeat 100 ...
Same pseudo-random sequence in both HalfCmp Compare time secs 32.12 with Error Cnt 0
All memory tests passed :)
 
Smallest cap here is "10pF Ceramic" with that on two 1 inch pieces of 30ga the 211 MHz error count on first run goes from bad to worse and both 166 and 198 MHz go from working without CAP, to huge error count with this cap. Next here is 22 pF from same kit.
 
If you want to stay in the lower ranges of capacitance as Paul Stoffregen suggested in p#62 earlier, try the following:

- with 3 10pF caps in parallel, you could test approximately 3pF.
- with 2 10pF caps in parallel, you could test 5pF.
- with 3 22pF caps in parallel, you could test approximately 7pF.
- with 3 10pF caps in parallel, connected in series with 2 10pF caps in parallel, you could test approximately 8pF.
- with a single 10pF cap, you could test 10pF (as you have already done).
- with 2 10pF caps in parallel, connected in series with 3 22pF caps in parallel, you could test approximately 12pF.
- with a single 10pF cap connected in series with 2 10pF caps in parallel, you could test 15pF.

Mark J Culross
KD5RXT
 
Oppps - first tried was a 22pF - unsoldering the 22 going to 10 ...

221 MHz @NONE pF : Errors Cnt 57
221 MHz @10pF : Errors Cnt 4,194,266
221 MHz @5pF (2*10): Errors Cnt 1,889,704
221 MHz @3pF (3*10): Errors Cnt 863,193
SAME- INSTANT FAIL pseudo-random sequence written does not match as written in both Halves: Errors Cnt 863193

The testing tends to the same value of ERRORS - but it can vary.
Would need better parts and ranges for real testing.
Perhaps comments on wire length being critical? To get thee legged things to SMD '402' pads - as noted 30ga wire in use and each leg most of an inch.
 
Um, I think that needs to be:-
- with 3 10pF caps in series, you could test approximately 3pF.
- with 2 10pF caps in series, you could test 5pF.
- with 3 22pF caps in series, you could test approximately 7pF.
- with 3 10pF caps in series, connected in parallel with 2 10pF caps in series, you could test approximately 8pF.
- with a single 10pF cap, you could test 10pF (as you have already done).
- with 2 10pF caps in series, connected in parallel with 3 22pF caps in series, you could test approximately 12pF.
- with a single 10pF cap connected in parallel with 2 10pF caps in series, you could test 15pF.
 
Um, I think that needs to be:-
- with 3 10pF caps in series, you could test approximately 3pF.
- with 2 10pF caps in series, you could test 5pF.
- with 3 22pF caps in series, you could test approximately 7pF.
- with 3 10pF caps in series, connected in parallel with 2 10pF caps in series, you could test approximately 8pF.
- with a single 10pF cap, you could test 10pF (as you have already done).
- with 2 10pF caps in series, connected in parallel with 3 22pF caps in series, you could test approximately 12pF.
- with a single 10pF cap connected in parallel with 2 10pF caps in series, you could test 15pF.
That's right - resistors in series add - parallel divide ... CAPS the opposite should have remembered that before.

So what about wire length and integrity of the solder connection with regard to caps?
 
Back to you @Dogbone06 - this will require some quality parts (tolerance and value options) and likely better soldering than the little 'Tree' growing here
Going the right direction ... some NON_InstaFail at 2.895 pF!
>> 10+10+10+22 in series would be 2.895 pF?

PseudoRand(0) Seed 2976674124 with readRepeat 10 ...

INSTANT FAIL pseudo-random sequence written does not match as written in both Halves: Errors Cnt 3
PseudoRand(1) Seed 1438200953 with readRepeat 10 ...
Fail pseudo-random sequence not same in both HalfCmp with seed=1438200953
Same pseudo-random sequence in both HalfCmp Compare time secs 3.45 with Error Cnt 195
PseudoRand(2) Seed 3413783263 with readRepeat 10 ...

INSTANT FAIL pseudo-random sequence written does not match as written in both Halves: Errors Cnt 1
PseudoRand(3) Seed 1900517911 with readRepeat 10 ...
Fail pseudo-random sequence not same in both HalfCmp with seed=1900517911
Same pseudo-random sequence in both HalfCmp Compare time secs 3.45 with Error Cnt 11
PseudoRand(4) Seed 1227909400 with readRepeat 10 ...
Fail pseudo-random sequence not same in both HalfCmp with seed=1227909400
Same pseudo-random sequence in both HalfCmp Compare time secs 3.45 with Error Cnt 23
PseudoRand(5) Seed 276562754 with readRepeat 10 ...

INSTANT FAIL pseudo-random sequence written does not match as written in both Halves: Errors Cnt 1
PseudoRand(6) Seed 146878114 with readRepeat 10 ...
Fail pseudo-random sequence not same in both HalfCmp with seed=146878114
Same pseudo-random sequence in both HalfCmp Compare time secs 3.45 with Error Cnt 140
PseudoRand(7) Seed 615545407 with readRepeat 10 ...

Another +22pF in series:: 2.558 pF ... ONLY Insta Fails and in the teens to 60 so seems this is the LOW END of desired capacitance.
https://www.omnicalculator.com/physics/capacitors-in-series

So, is CAP pF the issue or running a 166 MHz SDRAM at 221 MHz?

<edit>
I can try a 5pF (series 10pF) and see where the number falls to see if that is the upper end perhaps where 2 pF may be the low end.
Changing some UI - Instant Fail at END of LINE to differentiate those runs that have a better start, but then Errors present which is progress.
Adding second Instant test that may get a second read on the Instant Fail state {as highlighted bold above)
Also for this test as Paul suggested - it needs a SerMon UI to Re-Run (already added just SerMon 'Send') - and probably to adjust from quick run that fails when bad to alternate with more or longer test counts if a sweet spot is found.
Liked the one made for LittleFS Integrity - will look to import a workalike.
 
Last edited:
Morning all.

Here is are updated core files and examples for SDRAM. Note you can disable SDRAM by editing hasSDRAMKludge.h and commenting out the define. I wrapped the mpu stuff so that will be disabled as well. Note this is for testing purposes only.

Clock is setup for 133mhz so if you want to run at 166 with the cap removed you will have to edit the sdram.c file. I updated the repo and here is the zip just in case:
 

Attachments

  • extsdram.zip
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Um, I think that needs to be:-
- with 3 10pF caps in series, you could test approximately 3pF.
- with 2 10pF caps in series, you could test 5pF.
- with 3 22pF caps in series, you could test approximately 7pF.
- with 3 10pF caps in series, connected in parallel with 2 10pF caps in series, you could test approximately 8pF.
- with a single 10pF cap, you could test 10pF (as you have already done).
- with 2 10pF caps in series, connected in parallel with 3 22pF caps in series, you could test approximately 12pF.
- with a single 10pF cap connected in parallel with 2 10pF caps in series, you could test 15pF.
Yikes !! You are absolutely correct !! Should have gone to bed sooner !!

Mark J Culross
KD5RXT
 
@defragster when I test different cap I'm buying high quality ones to test with. You and I can work together on that, you can make sure I run the correct code and I'll make sure it's good caps!

I will start with: 4.7pF, 10pF, 15pF, all with 1% of less tolerance.

@Paul, what brand caps do you recommend? I have to order from abroad to get the right brand and tolerance.
Also, while I'm at it, please give me all values I should try, and I'll order all at once.
 
Last edited:
NXP's memory map actually allocates 1.5G for SEMC. In theory, up to 4 SDRAM chips could be connected. But it's NAND flash that would likely use up a lot of the available address space. So in anticipation of someone else later experimenting with NAND flash or other memory types, 1G seemed reasonable.

Before commenting this out, I tried 32M and 64M. Same problem. So far I haven't even started investigating.
 
Ok did a quick SPI test with ILI9341 display and does not seem to be working correctly - I ran graphicstest with SDRAM turned off as with it on seems to hang the MM. Have to investigate further but running out of time until late this afternoon.

EDIT: I lied - display not working - switched displays and now working for graphicstest :)
 
Last edited:
@mjs513 did you try run the display test with a framebuffer in SDRAM?
Wonder if it would have any effect on the results with a fairly small display
 
@mjs513 did you try run the display test with a framebuffer in SDRAM?
Wonder if it would have any effect on the results with a fairly small display
Wanted to try a framebuffer using SDRAM but if I enable SDRAM SPI hangs like I2C does when trying to use it with SDRAM. So answer is no but had wanted to try.

Oh just as a side not SDRAM doesn't seem to work without setting the MPU configuration.
 
Is there any logical explanation to why I2C would stop working with SDRAM? Is it only one I2C bus or all of them?
 
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