Call to arms | Teensy + WiFi = true

In addition to Arduino Giga, I ordered a couple of this eval board with the 1XK module. Will make a M.2 adaptor PCB soon...

1XK is more expensive, but it's dual band. Most routers have 5 GHz Wifi and many upstream internet connections are usually fast enough to support it, so perhaps the more expensive 1XK will be worth its extra cost?
We should absolutely get the 1XK to work as well. I'm all for that. Will let you know the second the 1DX's and 1YN's ship from factorym should be in a few days.
 
I drafted a quick PCB layout to connect the 1XK eval board to Teensy 4.1.

Hopefully both will arrive by next week.

1751568852040.png

1751568860962.png


If anyone's curious, here's my notes about the connections.

Code:
M.2     Signal          Teensy          1XK     Notes
---     ------          ------          ---     -----
1       GND
2       3.3V
3       nc
4       3.3V
5       nc
6       nc
7       GND
8       BT_PCM_CLK      4               8 g6
9       SDIO_CLK        23              4
10      BT_PCM_SYNC     3               9 g7
11      SDIO_CMD        22              6       pullup resistor required
12      BT_PCM_OUT      2 or 5          14 g5   resistors to route to Teensy pins 2 or 5
13      SDIO_D0         40              5       pullup resistor required
14      BT_PCM_IN       5 or 2          11 g4   resistors to route to Teensy pins 2 or 5
15      SDIO_D1         41              56      pullup resistor required
16      nc
17      SDIO_D2         17              3       pullup resistor required
18      GND
19      SDIO_D3         16              55      pullup resistor required
20      BT_HOST_WAKE_L                  17 g14  drives with OD buffer, pullup resistor required
21      WL_HOST_WAKE_L                  12 g1   drives with OD buffer, pullup resistor required
22      BT_UART_TXD     34              54 g10
23      nc

32      BT_UART_RXD     35              7 g9
33      GND
34      BT_UART_RTS     inv->36         51 g11  use 74LV1T04 inverter between 1XK-Teensy pin 36
35      nc
36      BT_UART_CTS     37              15 g8
37      nc
38      JTAG_TDO                                not used
39      GND
40      WL_DEV_WAKE_L   ??                      ??? does this matter
41      nc
42      BT_DEV_WAKE_L   ??                      ??? does this matter
43      nc
44      JTAG_TDI                                not used
45      GND
46      JTAG_TCK                                not used
47      nc
48      JTAG_TMS                                not used
49      nc
50      32kHz clock                             ??? do we need this for sleep modes
51      GND
52      nc
53      nc
54      nc
55      nc
56      PMIC_EN         32-maybe        3       reset circuit CAT811T, or Teensy pin 32 + pullup
57      GND
58      nc
59      nc
60      nc
61      nc
62      nc
63      GND
64      3.3V I/O                                turns all 1.8V I/O into 3.3V signals
65      nc
66      nc
67      nc
68      nc
69      GND
70      nc
71      nc
72      3.3V
73      nc
74      3.3V
75      GND
 
I drafted a quick PCB layout to connect the 1XK eval board to Teensy 4.1.

Hopefully both will arrive by next week.

View attachment 37814
View attachment 37815

If anyone's curious, here's my notes about the connections.

Code:
M.2     Signal          Teensy          1XK     Notes
---     ------          ------          ---     -----
1       GND
2       3.3V
3       nc
4       3.3V
5       nc
6       nc
7       GND
8       BT_PCM_CLK      4               8 g6
9       SDIO_CLK        23              4
10      BT_PCM_SYNC     3               9 g7
11      SDIO_CMD        22              6       pullup resistor required
12      BT_PCM_OUT      2 or 5          14 g5   resistors to route to Teensy pins 2 or 5
13      SDIO_D0         40              5       pullup resistor required
14      BT_PCM_IN       5 or 2          11 g4   resistors to route to Teensy pins 2 or 5
15      SDIO_D1         41              56      pullup resistor required
16      nc
17      SDIO_D2         17              3       pullup resistor required
18      GND
19      SDIO_D3         16              55      pullup resistor required
20      BT_HOST_WAKE_L                  17 g14  drives with OD buffer, pullup resistor required
21      WL_HOST_WAKE_L                  12 g1   drives with OD buffer, pullup resistor required
22      BT_UART_TXD     34              54 g10
23      nc

32      BT_UART_RXD     35              7 g9
33      GND
34      BT_UART_RTS     inv->36         51 g11  use 74LV1T04 inverter between 1XK-Teensy pin 36
35      nc
36      BT_UART_CTS     37              15 g8
37      nc
38      JTAG_TDO                                not used
39      GND
40      WL_DEV_WAKE_L   ??                      ??? does this matter
41      nc
42      BT_DEV_WAKE_L   ??                      ??? does this matter
43      nc
44      JTAG_TDI                                not used
45      GND
46      JTAG_TCK                                not used
47      nc
48      JTAG_TMS                                not used
49      nc
50      32kHz clock                             ??? do we need this for sleep modes
51      GND
52      nc
53      nc
54      nc
55      nc
56      PMIC_EN         32-maybe        3       reset circuit CAT811T, or Teensy pin 32 + pullup
57      GND
58      nc
59      nc
60      nc
61      nc
62      nc
63      GND
64      3.3V I/O                                turns all 1.8V I/O into 3.3V signals
65      nc
66      nc
67      nc
68      nc
69      GND
70      nc
71      nc
72      3.3V
73      nc
74      3.3V
75      GND
This is looking promising, good work!
 
Turns out the circuit boards (msg #29) that I ordered from China on July 3 will arrive today (Monday), but the 1XK eval boards I ordered from Texas on July 2 won't come until Wednesday. Also due to arrive Wednesday are the 1DX and 1YN boards from @Dogbone06. I'm excited to really get into the software, but looks like I need to wait a few more days to have enough hardware to even start.
 
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