Call to arms | Teensy + WiFi = true

defragster · Jun 9, 2026

sparkfro said:
those pins work (23,22,40,41,17,16),

Indeed those pins work as tested here, see p#73 with board shown as received from @Dogbone06

https://forum.pjrc.com/index.php?threads/call-to-arms-teensy-wifi-true.77099/post-366611

mjs513 · Jun 9, 2026

@wwatson

Trying to catch up on this - man you all been busy. Can you post the link to the library so I can give it a try.

I tried this lib https://github.com/wwatson4506/T4_WIFI_CYW4343W/tree/main
but keep getting the following on the T41

Code:

cardCommand(341a0000, 400) error isBusyCommandInhibit
CMD52 failed
cardCommand(341a0000, 80000402) error isBusyCommandInhibit
CMD52 failed
cardCommand(341a0000, 400) error isBusyCommandInhibit
CMD52 failed
cardCommand(341a0000, 600) error isBusyCommandInhibit
CMD52 failed
BUS_IORDY_REG (Ready indication) returned 0

EDIT: These are the pins I am using
CLK 23
CMD 22
D0 40
D1 41
D2 17
D3 16
INT 34
WL_ON 33

wwatson · Jun 9, 2026

mjs513 said:
@wwatson

Trying to catch up on this - man you all been busy. Can you post the link to the library so I can give it a try.

I tried this lib https://github.com/wwatson4506/T4_WIFI_CYW4343W/tree/main
but keep getting the following on the T41

Code:

cardCommand(341a0000, 400) error isBusyCommandInhibit CMD52 failed cardCommand(341a0000, 80000402) error isBusyCommandInhibit CMD52 failed cardCommand(341a0000, 400) error isBusyCommandInhibit CMD52 failed cardCommand(341a0000, 600) error isBusyCommandInhibit CMD52 failed BUS_IORDY_REG (Ready indication) returned 0

Yes, The latest is using a version of QNEthernet found here. I have not tried that library in a while. It was working. I will test it and see if there is a problem. For now it looks like there is a problem with SDIO communication to the CYW4343 chip. Maybe double check the wiring?
This is the pinout that is working on the T4.1:

Code:

TEENSY 4.1 WIFI Board

  23 --------> clk
  22 --------> cmd
  17 --------> D2
  16 --------> D3
  41 --------> D1
  40 --------> D0
  34 --------> INT
  33 --------> WL_ON

I will get back to you after testing the library in question...
EDIT: You beat me to it

Pinout looks correct...

defragster · Jun 9, 2026

@mjs513 : seems it is this:

GitHub - wwatson4506/QNEthernet_WIFI: A version of QNEthernet Adapted to USE with the CYW4343x WIFI device.

A version of QNEthernet Adapted to USE with the CYW4343x WIFI device. - wwatson4506/QNEthernet_WIFI

github.com

Post somewhere in thread ...
You have to watch this line as it converted wired to WiFi:

QNEthernet_WIFI/src/qnethernet_opts.h at main · wwatson4506/QNEthernet_WIFI

A version of QNEthernet Adapted to USE with the CYW4343x WIFI device. - wwatson4506/QNEthernet_WIFI

github.com

and https://github.com/wwatson4506/QNEt...src/qnethernet/drivers/cyw4343w/src/secrets.h

But a local copy should work?

sparkfro · Jun 9, 2026

FWIW I've tried using SDIO with jumper wires before (different project) and had a bad time. Use the shortest wires you can if you're using jumpers.

mjs513 · Jun 9, 2026

@defragster
Thanks for the link - you dont have a simple scan networks sketch by any chance?

> Post somewhere in thread ...
:> You have to watch this line as it converted wired to WiFi:

Keep getting this error

Rich (BB code):

D:\Users\Merli\Documents\Arduino\libraries\QNEthernet_WIFI-main\examples\Ping\Ping.ino:26:10: fatal error: ../src/qnethernet/drivers/cyw4343w/src/event.h: No such file or directory
   26 | #include "../src/qnethernet/drivers/cyw4343w/src/event.h"

defragster · Jun 9, 2026

sparkfro said:
using SDIO with jumper wires

Indeed - was lucky the 4" wires as used/shown worked! But ran some of the @wwatson examples to good results in the end without having to modify connections.
When @KurtE was developing with SD card on SDIO IIRC for the Library to get to this WiFi - results were messy one socket over on a PJRC supplied Beta baseboard - so another inch on a PCB farther from T_4.1 and it was iffy.

mjs513 said:
Keep getting this error

Odd because it should exist as it does on github?

https://github.com/wwatson4506/QNEthernet_WIFI/blob/main/src/qnethernet/drivers/cyw4343w/src/event.h

wwatson · Jun 9, 2026

Go to "Arduino/libraries/QNEthernet_WIFI/src/qnethernet_opts.h" and open it up with a text editor.
The very beginning of the file should look like this:

Code:

// SPDX-FileCopyrightText: (c) 2024-2026 Shawn Silverman <shawn@pobox.com>
// SPDX-License-Identifier: AGPL-3.0-or-later

// qnethernet_opts.h defines configuration options for the QNEthernet library.
// Users can modify this file instead of defining project-wide macros.
// This file is part of the QNEthernet library.

#pragma once

// 1 == Disable T41 native ethernet IF and enable T41 CYW4343W IF.
// 0 == Enable T41 native ethernet IF and disable T41 CYW4343W IF.
#ifndef ARDUINO_TEENSY41_CYW4343W
#define ARDUINO_TEENSY41_CYW4343W 1 <---- this must be set to 1 to use WIFI
#endif

Make sure "#define ARDUINO_TEENSY41_CYW4343W" is set to 1. This selects the CYW4343W driver for use...

mjs513 · Jun 9, 2026

@wwatson

just did a double check and

Code:

#ifndef ARDUINO_TEENSY41_CYW4343W
#define ARDUINO_TEENSY41_CYW4343W 1
#endif

and looks like its set to 1 but still get that error about
D:\Users\Merli\Documents\Arduino\libraries\QNEthernet_WIFI-main\examples\cyw43_scan\cyw43_scan.ino:27:10: fatal error: ../src/qnethernet/drivers/cyw4343w/src/cyw43_T4_SDIO.h: No such file or directory
27 | #include "../src/qnethernet/drivers/cyw4343w/src/cyw43_T4_SDIO.h"

wwatson · Jun 9, 2026

I will have to fire up the windows machine and check it out...

mjs513 · Jun 9, 2026

Ok solved the missing file issue by giving it the whole path to the library. Once I did that I see

Code:

    8 | #pragma message("Using CYW4343W QNEthernet Driver")

but still getting

Rich (BB code):

cardCommand(341a0000, 80000402) error isBusyCommandInhibit
CMD52 failed
cardCommand(341a0000, 400) error isBusyCommandInhibit
CMD52 failed
cardCommand(341a0000, 600) error isBusyCommandInhibit
CMD52 failed
BUS_IORDY_REG (Ready indication) returned 0
initialization failed!
Setup complete

End of day for me so tomorrow will find shorter wires - mine are about 6 inches and see if that helps

wwatson · Jun 9, 2026

mjs513 said:
Ok solved the missing file issue by giving it the whole path to the library. Once I did that I see

Code:

8 | #pragma message("Using CYW4343W QNEthernet Driver")

but still getting

Rich (BB code):

cardCommand(341a0000, 80000402) error isBusyCommandInhibit CMD52 failed cardCommand(341a0000, 400) error isBusyCommandInhibit CMD52 failed cardCommand(341a0000, 600) error isBusyCommandInhibit CMD52 failed BUS_IORDY_REG (Ready indication) returned 0 initialization failed! Setup complete

End of day for me so tomorrow will find shorter wires - mine are about 6 inches and see if that helps

Glad to here it

I am using short 3" wires but I also have had problems with bad connections on the breadboard. I have to move the wires around a bit to get a good connection. I need some new breadboards again...

defragster · Jun 9, 2026

Not seeing any REPORT when bad SSID is provided.
Giving what I think is SSID and PWD I get ZERO scan results?
Build is fine.

Made local copy of secrets.h and edited INO path from within library ...

Code:

CPU speed: 600 MHz
===========================
CYW4343W Card::begin: SDIO2
===========================
Attaching OOB interrupt to pin 34
Enabled CYW4343W bus high speed interface
BUS_IORDY_REG (Ready indication) returned OK
SDHC bus set to 4-bit, speed set to 33MHz
*************
CardID: 43430
*************
Set SRAM_IOCTRL_REG validated
Set SRAM_IOCTRL_REG second validation
Set SRAM_RESETCTRL_REG validated
Uploading firmware data
Uploaded firmware, 419798 of 419798 bytes
Uploading NVRAM data
Uploaded NVRAM, 680 of 680 bytes
Set BAK_CHIP_CLOCK_CSR_REG validated
Set BUS_IORDY_REG validated
Configuring WL_IRQ OOB
==============================
End W4343WCard::begin: SDIO2
==============================
Uploading CLM, size: 7222
CLM uploaded 7222/7222 result: 1
CLM version API: 12.2
Data: 9.10.39
Compiler: 1.29.4
ClmImport: 1.36.3
Creation: 2020-02-16 22:32:13

initialization done
ssid
PWD
MAC address - 70:87:A7:11:98:A5
Firmware wl0: Mar 30 2021 01:12:21 version 7.45.98.118 (7d96287 CY) FWID 01-32059766

Setup complete

Setting scan channel time

WiFi CPU running

Events enabled

Set data escan
Number of scan entries: 0, Unfiltered scan (duplicate and hidden entries shown!)
Press any key to continue...

> Added sketch print of SSID and PWD (after 'init done') - though not sure that is being used internally - though did copy same into library?

wwatson · Jun 9, 2026

@defragster - The "cyw43_scan.ino" sketch does not use SSID or PWD. I'm in windows right now. Also @mjs513 I ran the sketch in windows with this result:

Code:

CPU speed: 600 MHz
===========================
CYW4343W Card::begin: SDIO2
===========================
Attaching OOB interrupt to pin 34
Enabled CYW4343W bus high speed interface
BUS_IORDY_REG (Ready indication) returned OK
SDHC bus set to 4-bit, speed set to 33MHz
*************
CardID: 43430
*************
Set SRAM_IOCTRL_REG validated
Set SRAM_IOCTRL_REG second validation
Set SRAM_RESETCTRL_REG validated
Uploading firmware data
Uploaded firmware, 419798 of 419798 bytes
Uploading NVRAM data
Uploaded NVRAM, 680 of 680 bytes
Set BAK_CHIP_CLOCK_CSR_REG validated
Set BUS_IORDY_REG validated
Configuring WL_IRQ OOB
==============================
End W4343WCard::begin: SDIO2
==============================
Uploading CLM, size: 7222
CLM uploaded 7222/7222 result: 1
CLM version API: 12.2
Data: 9.10.39
Compiler: 1.29.4
ClmImport: 1.36.3
Creation: 2020-02-16 22:32:13

initialization done
MAC address - 70:87:A7:10:64:B5
Firmware wl0: Mar 30 2021 01:12:21 version 7.45.98.118 (7d96287 CY) FWID 01-32059766

Setup complete

Setting scan channel time

WiFi CPU running

Events enabled

Set data escan
BSSID - 10:E1:77:00:FD:D6  |  Signal:  -87 dBm  |  Channel #1  |  SSID: 'catscats2'
BSSID - 0E:E1:77:00:FD:D6  |  Signal:  -86 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - D4:6C:6D:5B:DB:B1  |  Signal:  -82 dBm  |  Channel #1  |  SSID: 'Brentina'
BSSID - CE:6C:6D:5B:DB:B1  |  Signal:  -84 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - D6:6C:6D:5B:DB:B1  |  Signal:  -82 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - 0E:FE:7B:AA:6E:E1  |  Signal:  -88 dBm  |  Channel #1  |  SSID: 'hobo.net'
BSSID - 0E:FE:7B:AA:6E:E5  |  Signal:  -89 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - 0E:FE:7B:AA:6E:E6  |  Signal:  -90 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - 98:F7:81:41:DC:45  |  Signal:  -84 dBm  |  Channel #1  |  SSID: 'Tree House'
BSSID - 38:3F:B3:39:6A:1B  |  Signal:  -85 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - 1E:61:B4:1A:0D:AB  |  Signal:  -83 dBm  |  Channel #2  |  SSID: 'TP-Link_Guest_0DAC'
BSSID - 8E:F7:81:41:DC:45  |  Signal:  -86 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - 8C:86:DD:09:4B:F6  |  Signal:  -90 dBm  |  Channel #1  |  SSID: 'CasaGirlypop_EXT'
BSSID - 1C:61:B4:1A:0D:AB  |  Signal:  -84 dBm  |  Channel #2  |  SSID: 'Peaches'
BSSID - 1E:61:B4:1A:0D:AB  |  Signal:  -85 dBm  |  Channel #2  |  SSID: 'TP-Link_Guest_0DAC'
BSSID - 3E:61:B4:1A:0D:AB  |  Signal:  -83 dBm  |  Channel #2  |  SSID: '[hidden]'
BSSID - 3E:61:B4:1A:0D:AB  |  Signal:  -82 dBm  |  Channel #2  |  SSID: '[hidden]'
BSSID - 1E:61:B4:1A:0D:AB  |  Signal:  -86 dBm  |  Channel #2  |  SSID: 'TP-Link_Guest_0DAC'
BSSID - DC:8D:8A:DB:6B:6F  |  Signal:  -84 dBm  |  Channel #6  |  SSID: 'TMOBILE-6B66'
BSSID - DC:8D:8A:DB:6B:6F  |  Signal:  -88 dBm  |  Channel #6  |  SSID: 'TMOBILE-6B66'
BSSID - BC:9B:68:0C:FA:99  |  Signal:  -81 dBm  |  Channel #6  |  SSID: '[hidden]'
BSSID - 6C:5A:B0:16:E4:F2  |  Signal:  -91 dBm  |  Channel #6  |  SSID: 'TheCatDen'
BSSID - 6E:5A:B0:26:E4:F2  |  Signal:  -85 dBm  |  Channel #6  |  SSID: '[hidden]'
BSSID - C6:4F:D5:C9:74:A9  |  Signal:  -45 dBm  |  Channel #6  |  SSID: 'wswn_xf'
BSSID - C6:4F:D5:C9:74:AE  |  Signal:  -47 dBm  |  Channel #6  |  SSID: '[hidden]'
BSSID - C6:4F:D5:C9:74:AF  |  Signal:  -46 dBm  |  Channel #6  |  SSID: '[hidden]'
BSSID - BC:9B:68:0C:FA:98  |  Signal:  -86 dBm  |  Channel #6  |  SSID: '[hidden]'
BSSID - 1E:9E:CC:50:D8:88  |  Signal:  -74 dBm  |  Channel #6  |  SSID: 'duckyscastle'
BSSID - 1E:9E:CC:50:D8:8D  |  Signal:  -74 dBm  |  Channel #6  |  SSID: '[hidden]'
BSSID - 1E:9E:CC:50:D8:8E  |  Signal:  -75 dBm  |  Channel #6  |  SSID: '[hidden]'
BSSID - 08:9B:B9:C8:BC:2B  |  Signal:  -94 dBm  |  Channel #6  |  SSID: 'TMOBILE-BC22'
BSSID - 24:41:FE:27:44:D6  |  Signal:  -91 dBm  |  Channel #8  |  SSID: 'Verizon_XT67W4'
BSSID - BC:9B:68:0C:FA:99  |  Signal:  -82 dBm  |  Channel #6  |  SSID: '[hidden]'
BSSID - 62:9C:8E:18:A0:99  |  Signal:  -57 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 74:FE:CE:13:0D:8B  |  Signal:  -79 dBm  |  Channel #8  |  SSID: 'watch out when IP'
BSSID - 76:FE:CE:23:0D:8B  |  Signal:  -80 dBm  |  Channel #8  |  SSID: '[hidden]'
BSSID - 30:29:2B:AB:CF:03  |  Signal:  -42 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 62:9C:8E:18:A0:99  |  Signal:  -45 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 62:9C:8E:18:A0:9B  |  Signal:  -45 dBm  |  Channel #11 |  SSID: 'wswn_xf'
BSSID - 30:29:2B:AB:CF:03  |  Signal:  -39 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 74:FE:CE:13:0D:8B  |  Signal:  -85 dBm  |  Channel #8  |  SSID: 'watch out when IP'
BSSID - 76:FE:CE:23:0D:8B  |  Signal:  -83 dBm  |  Channel #8  |  SSID: '[hidden]'
BSSID - 62:9C:8E:18:A0:9B  |  Signal:  -43 dBm  |  Channel #11 |  SSID: 'wswn_xf'
BSSID - 6C:CD:D6:8E:63:CF  |  Signal:  -95 dBm  |  Channel #10 |  SSID: 'Chateau Pueget'
BSSID - 30:29:2B:AB:CF:03  |  Signal:  -38 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 30:29:2B:AB:CF:07  |  Signal:  -39 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 30:29:2B:AB:CF:05  |  Signal:  -38 dBm  |  Channel #11 |  SSID: 'wswn_eero'
BSSID - DE:CD:2F:CF:6B:16  |  Signal:  -51 dBm  |  Channel #11 |  SSID: 'DIRECT-pq-EPSON-XP-6100 Series'
BSSID - D4:AB:82:C4:03:6F  |  Signal:  -88 dBm  |  Channel #11 |  SSID: 'June Bug'
BSSID - D6:AB:82:C4:03:6F  |  Signal:  -88 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - DA:AB:82:C4:03:6F  |  Signal:  -86 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 62:9C:8E:18:A0:99  |  Signal:  -44 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 62:9C:8E:18:A0:9B  |  Signal:  -45 dBm  |  Channel #11 |  SSID: 'wswn_xf'
BSSID - CE:AB:82:C4:03:6F  |  Signal:  -86 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 72:13:01:3F:C3:11  |  Signal:  -80 dBm  |  Channel #11 |  SSID: 'Hen House'
BSSID - 72:13:01:3F:C3:16  |  Signal:  -78 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 30:29:2B:AB:CF:03  |  Signal:  -39 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 30:29:2B:AB:CF:07  |  Signal:  -38 dBm  |  Channel #11 |  SSID: '[hidden]'
BSSID - 30:29:2B:AB:CF:05  |  Signal:  -38 dBm  |  Channel #11 |  SSID: 'wswn_eero'
Number of scan entries: 60, Unfiltered scan (duplicate and hidden entries shown!)
Press any key to continue...

In a previous post I noted that there are issues with the scan functions hanging the T4.1 intermittently. Still need to look into this.
As this is an unfiltered scan, there are duplicate entries. This is normal. While I am in windows I am going to test the rest of the sketches...

defragster · Jun 9, 2026

wwatson said:
does not use SSID or PWD.

DOH! Of course not - though it has path to secrets that confused me.
> #include "../src/qnethernet/drivers/cyw4343w/src/secrets.h"

Had it be intermittent before - then work - now after more than a few uploads and restarts it fails to ever see any - even on a longer USB cable where I thought antenna might have been hidden. My 'antenna' may not be right - didn't find the one @Dogbone06 sent.

wwatson · Jun 9, 2026

defragster said:
DOH! Of course not - though it has path to secrets that confused me.
> #include "../src/qnethernet/drivers/cyw4343w/src/secrets.h"

Had it be intermittent before - then work - now after more than a few uploads it fails to ever see any - even on a longer USB cable where I thought antenna might have been hidden. My 'antenna' may not be right - didn't find the one @Dogbone06 sent.

Dang that copy and paste stuff

I did not try to trip you up on purpose

But seriously I have not run into blank output with the scan sketch so it might really be a problem with the antenna. I live in a apartment complex and sometimes I get 60 or more entries...

wwatson · Jun 9, 2026

One last post and then I have to take care of a sick wife. I tested several more of the sketches in QNEthernet_WIFI and they all worked without issue...

jmarsh · Jun 9, 2026

sparkfro said:
Hmm, that doesn't match my understanding. The Teensy 4.1 schematic shows pins SD_B0_n are used for the SD card slot, which is for uSDHC1. uSDHC2 uses SD_B1_n for uSDHC2, which are not broken out on the Teensy 4.1.

Maybe @KurtE can shed some light here?

Ultimately, if those pins work (23,22,40,41,17,16), then that's what matters. More just a curiosity of why those pins work with SDIO

uSDHC2 has more than one set of pins available, see page 314 of the reference manual (rev3):

(This is why I once suggested an MMC add-on for T4.1 would be a good idea - all 8 data pins are available...)

mjs513 · Jun 10, 2026

Morning
Rewired and used shorter wires for the heck of it - found I had a couple of wires shifted by a pin -- cant count

Once I did that it started working

Rich (BB code):

CPU speed: 600 MHz
===========================
CYW4343W Card::begin: SDIO2
===========================
Attaching OOB interrupt to pin 34
Enabled CYW4343W bus high speed interface
BUS_IORDY_REG (Ready indication) returned OK
SDHC bus set to 4-bit, speed set to 33MHz
*************
CardID: 43430
*************
Set SRAM_IOCTRL_REG validated
Set SRAM_IOCTRL_REG second validation
Set SRAM_RESETCTRL_REG validated
Uploading firmware data
Uploaded firmware, 419798 of 419798 bytes
Uploading NVRAM data
Uploaded NVRAM, 680 of 680 bytes
Set BAK_CHIP_CLOCK_CSR_REG validated
Set BUS_IORDY_REG validated
Configuring WL_IRQ OOB
==============================
End W4343WCard::begin: SDIO2
==============================
Uploading CLM, size: 7222
CLM uploaded 7222/7222 result: 1
CLM version API: 12.2
Data: 9.10.39
Compiler: 1.29.4
ClmImport: 1.36.3
Creation: 2020-02-16 22:32:13

initialization done
MAC address - 70:87:A7:10:43:64
Firmware wl0: Mar 30 2021 01:12:21 version 7.45.98.118 (7d96287 CY) FWID 01-32059766

Setup complete

Setting scan channel time

WiFi CPU running

Events enabled

Set data escan
BSSID - 0C:93:A5:02:73:A4  |  Signal:  -82 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - 0C:93:A5:02:73:A8  |  Signal:  -81 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - 0C:93:A5:02:73:A6  |  Signal:  -82 dBm  |  Channel #1  |  SSID: 'Verizon_C3G7C6'
BSSID - 3C:F0:83:E9:AF:A0  |  Signal:  -87 dBm  |  Channel #1  |  SSID: 'TMOBILE-0535'
BSSID - 3E:F0:83:19:AF:A0  |  Signal:  -87 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - 3E:06:E6:7D:F3:24  |  Signal:  -94 dBm  |  Channel #1  |  SSID: 'Verizon_GN7C6B-Guest'
BSSID - 80:82:FE:70:2D:22  |  Signal:  -81 dBm  |  Channel #1  |  SSID: 'Verizon_TWVGZ9'
BSSID - 3C:BD:C5:3F:72:F2  |  Signal:  -46 dBm  |  Channel #1  |  SSID: 'Fios-2RnJp'
BSSID - 0C:93:A5:02:73:A4  |  Signal:  -81 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - 0C:93:A5:02:73:A8  |  Signal:  -82 dBm  |  Channel #1  |  SSID: '[hidden]'
BSSID - 0C:93:A5:02:73:A6  |  Signal:  -81 dBm  |  Channel #1  |  SSID: 'Verizon_C3G7C6'

And did note the issue with hanging where I to hit the pgm button - note seems to be intermittent as @defragster mentioned

wwatson said:
In a previous post I noted that there are issues with the scan functions hanging the T4.1 intermittently. Still need to look into this.
As this is an unfiltered scan, there are duplicate entries. This is normal. While I am in windows I am going to test the rest of the sketches...

KurtE · Jun 10, 2026

I am trying to remember which wifi unit that you are using now... Any photos?
Sorry been a bit distracted with other things. Might be fun to start testing again.

And believe it or not, sometimes my desk/work area is not overly organized

I now have two Atolla USB 3 hubs 7 switchable USB ports, mostly all full...

Earlier I was sort of waiting to see what Paul decides on and/or if there is a Teensy (now Sparkfun) product that will be supported...

Hopefully at some point, it would be potentially fully integrated, where for example we can download updated sketches... Which on some
of my Arduino boards, is my most used wifi feature. And/Or if it support bluetooth and allows us to for example connect up an XBox One controller using it...

wwatson · Jun 10, 2026

@KurtE - This one:

And the one I do not have is the SD card slot version:

It would be nice to see if this SD slot version works with QNEthernet_WIFI on the uSDHC1(did I get that right this time?)

sparkfro · Jun 10, 2026

jmarsh said:
uSDHC2 has more than one set of pins available, see page 314 of the reference manual (rev3):
View attachment 39466

(This is why I once suggested an MMC add-on for T4.1 would be a good idea - all 8 data pins are available...)

Oh of course! I should have looked at the reference manual. Thanks for the clarification!

FYI I started tinkering with the schematic and board layout. I'm following Murata's 1YN antenna design reference; it fits neatly between the headers, but requires 10mm of clearance from the back edge.

They say ground clearance, but clearance from all traces is ideal. That means it'd be best to avoid using pins 29-36. That would require the INT and WL_ON pins to change (should be fine, right?), and also excludes the Bluetooth UART from using Serial7 and Serial8.

Looking at the Teensy 4.1 Serial pin options, I'm considering using Serial3 because is can be mapped to pin 19 without going through the XBAR. That means an inverter is not needed, which simplifies the design and keeps cost down. Any objections to using Serial3 for the Bluetooth UART?

Also, as I was going through the 1YN pinout, I realized there's no dedicated INT pin. Which pin is used on your prototype for INT?

defragster · Jun 10, 2026

sparkfro said:
Which pin is used on your prototype for INT?

On the 1YN right?- would be a @Dogbone06 question for his drawing.

What is the UART baud rate for Bluetooth? Seems (@KurtE ?) UART of many FlexIO pins.

sparkfro · Jun 10, 2026

defragster said:
On the 1YN right?

Yep! Though it's the same exact pinout, minus a few pins. From Murata's 1DX and 1YN comparison, the 1DX has the following pins and the 1YN does not (changed to NC):

None of those are a dedicated interrupt.

From the CYW43439 datasheet, section 4.1 states:

"It has the ability to map the interrupt signal on a GPIO pin."

So from that, I would any of WL_GPIO0/1/2? I see WL_GPIO0 can send the WL_HOST_WAKE signal, is that the same thing? If so, does the BT_HOST_WAKE signal also need to be routed to a Teensy pin?

Actually now that I look again, I see that in 4-bit SDIO mode, the DATA1 pin can also generate an interrupt. Can the interrupt just be configured on the DATA1 pin instead of a separate pin for it?

defragster said:
What is the UART baud rate for Bluetooth?

From the CYW43439 datasheet, section 9.2:

"adjustable baud rates from 9600 bps to 4.0 Mbps. The interface features an automatic baud rate detection capability that returns a baud rate selection. Alternatively, the baud rate may be selected through a vendor-specific UART HCI command."

wwatson · Jun 10, 2026

@sparkfro - I am trying to find the schematic used for @Dogbone06 1DX board. Don't quote me on this but I think it is HOST_WAKE signal. Our current software is not using the In-band interrupt.

Code:

  ////////////////////
  // In-band interrupt
  ////////////////////
  // Attach in-band interrupt to DAT1 (GPIO mode only) - not in use, yet
  // TODO pin 34 is DAT1 on DB5 (pin #41 on T41). Need to change depending
  // on device. Eventually use lower level attachment, avoiding pin
//  #define DAT1_INTERRUPT_PIN 41 //34
  // Serial.printf(SER_TRACE "Attaching IB interrupt to pin %d\n" SER_RESET, DAT1_INTERRUPT_PIN);
//  pinMode(DAT1_INTERRUPT_PIN, INPUT);
//  attachInterrupt(digitalPinToInterrupt(DAT1_INTERRUPT_PIN), onDataInterruptHandler, FALLING);
  //////////////////////////////////
  //out-of-band interrupt on INT pin
  //////////////////////////////////
  if (m_wlIrqPin > -1) {
    Serial.printf(SER_TRACE "Attaching OOB interrupt to pin %d\n" SER_RESET, m_wlIrqPin);
    pinMode(m_wlIrqPin, INPUT);
    attachInterrupt(digitalPinToInterrupt(m_wlIrqPin), onWLIRQInterruptHandler, FALLING);
  }

The "m_wlIrqPin) is T4.1 pin #34.
I'll keep looking through all of or documents...
EDIT Just remembered as configured the int pin is not used for the 4 SDIO data pin transfers. I found this out using a logic analyzer.

Call to arms | Teensy + WiFi = true

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