Call to arms | Teensy + WiFi = true

shawn · Jul 6, 2026

shawn said:
I'd consider signing an NDA for this too.

@sparkfro One other detail is that I couldn't even get them to confirm that such a document existed, NDA or no. (A protocol document.)

sparkfro · Jul 8, 2026

Murata tech support just pointed me to the following:

User Guides ( https://community.murata.com/s/help-tab )
Forum ( https://community.murata.com/s/ )
MyMurata (https://my.murata.com/en/home)

I've got in touch with Infineon, hoping they can give me more direct info. Stay tuned!

sparkfro · Jul 8, 2026

We've completed our internal design review and are ready to order prototypes. Want to make sure I have allocations correct:

@shawn 2 for you
@wwatson 1 for you
@defragster 1 for you

@Dogbone06 @PaulStoffregen @KurtE @mjs513 I haven't seen requests from any of you, but you've all been active in this thread. Would you each like one?

Thanks!

Edit - Please PM me with your shipping address.

wwatson · Jul 8, 2026

@sparkfro - Yes, one for me. Thanks. Will send a PM with address if that is appropriate...

sparkfro · Jul 8, 2026

Also @Dogbone06 would you like to be attributed in our hardware design? If so, please let me know how you'd like to be attributed (eg. username, real name, etc.). Note that we typically license our designs under Creative Commons Attribution Share-Alike 4.0, is that okay with you?

sparkfro · Jul 8, 2026

wwatson said:
@sparkfro - Yes, one for me. Thanks. Will send a PM with address if that is appropriate...

Yes please, thanks!

shawn · Jul 8, 2026

sparkfro said:
Murata tech support just pointed me to the following:

User Guides ( https://community.murata.com/s/help-tab )
Forum ( https://community.murata.com/s/ )
MyMurata (https://my.murata.com/en/home)

I've got in touch with Infineon, hoping they can give me more direct info. Stay tuned!

I went around in circles with them. Then they said it doesn't exist. But I'm not sure I believe that.

sparkfro · Jul 9, 2026

From Infineon:

For SDIO interface in general and with respect to our Linux ecosystem software, the following guide is available: https://www.infineon.com/assets/row...n.pdf?fileId=8ac78c8c8c3de074018c8ba3a9973619

Similar is not available with respect to M-class devices.
However, you can check the WHD SDIO bus protocol source on the initialisation and other implementations.

whd-expansion/WHD/COMPONENT_WIFI6/src/bus_protocols/whd_bus_sdio_protocol.c at 0f13160971d02e7b1d4bd569da0d5eb96f2692d9 · Infineon/whd-expansion

Support wifi chipset on 3rd party platform as IMXRT platform - Infineon/whd-expansion

github.com

FYI: WHD is the driver available for M-class RTOS based devices for communicating with the Infineon Wi-Fi chips, here, CYW43439.
WHD expansion is the library for third-party MCU integration that adds WHD flavor for third party along with other necessary middleware for applications.

wwatson · Jul 9, 2026

QNEthernet_WIFI_0.36.0 is available here:

GitHub - wwatson4506/QNEthernet_WIFI: A version of QNEthernet Adapted to USE with the CYW4343x WIFI device.

A version of QNEthernet Adapted to USE with the CYW4343x WIFI device. - wwatson4506/QNEthernet_WIFI

github.com

Quite a few changes needed to be made to the CYW4343W driver to make it work with the new QNEthernet library. The main one was moving all of the CYW4343W init and begin code out of the CYW4343W driver file into a seperate file. So now the init and join methods are done with one call to "WIFIinit(const char *ssID, const char *passphrase, int security)".

@shawn - The changes you made to QNEthernet V0.36.0 had some very positive results for using the two QNEthernet ping sketches.

Using simplePing.ino:

Code:

Starting...
Please Wait...
MAC = 70:87:a7:10:64:b5
Waiting for local IP...
Setting link up
    Local IP    = 192.168.4.26
    Subnet mask = 255.255.252.0
    Gateway     = 192.168.4.1
    DNS         = 75.75.75.75

Pinging arduino.cc (18.238.238.4)...
1. Time = 19 ms
2. Time = 20 ms
3. Time = 16 ms
4. Time = 32 ms
5. Time = 17 ms
6. Time = 15 ms
7. Time = 16 ms
8. Time = 16 ms
9. Time = 25 ms
10. Time = 15 ms
11. Time = 16 ms
12. Time = 16 ms
13. Time = 16 ms
14. Time = 24 ms
15. Time = 20 ms
16. Time = 16 ms
17. Time = 18 ms
18. Time = 19 ms
19. Time = 22 ms

and ping.ino:

Code:

Starting...
Please Wait...
MAC = 70:87:a7:10:64:b5
Waiting for local IP...
Setting link up
    Local IP    = 192.168.4.26
    Subnet mask = 255.255.252.0
    Gateway     = 192.168.4.1
    DNS         = 75.75.75.75

Looking up "arduino.cc"...
IP = 18.238.238.12
1. 64 bytes from 18.238.238.12: seq=0 ttl=245 time=24 ms
2. 64 bytes from 18.238.238.12: seq=1 ttl=245 time=15 ms
3. 64 bytes from 18.238.238.12: seq=2 ttl=245 time=15 ms
4. 64 bytes from 18.238.238.12: seq=3 ttl=245 time=17 ms
5. 64 bytes from 18.238.238.12: seq=4 ttl=245 time=18 ms
6. 64 bytes from 18.238.238.12: seq=5 ttl=245 time=18 ms
7. 64 bytes from 18.238.238.12: seq=6 ttl=245 time=26 ms
8. 64 bytes from 18.238.238.12: seq=7 ttl=245 time=16 ms
9. 64 bytes from 18.238.238.12: seq=8 ttl=245 time=17 ms
10. 64 bytes from 18.238.238.12: seq=9 ttl=245 time=15 ms
11. 64 bytes from 18.238.238.12: seq=10 ttl=245 time=15 ms
12. 64 bytes from 18.238.238.12: seq=11 ttl=245 time=15 ms
13. 64 bytes from 18.238.238.12: seq=12 ttl=245 time=15 ms
14. 64 bytes from 18.238.238.12: seq=13 ttl=245 time=26 ms
15. 64 bytes from 18.238.238.12: seq=14 ttl=245 time=16 ms

They would not work previously. Nice fixes

Tested all of the examples. They all compile without error and most of the sketches that I could test worked (some of the sketches I have no idea yet what they are supposed to do)

That will come later. MAYBE! Also tested most of the original Arduino Ethernet sketches found at:

GitHub - wwatson4506/QNEthernet_WIFI_Examples: These are some of the original Ethernet library examples modified for QNEthernet_WIFI.

These are some of the original Ethernet library examples modified for QNEthernet_WIFI. - wwatson4506/QNEthernet_WIFI_Examples

github.com

Now back to the CYW43439 research...

EDIT: Just noticed that the README.md file needs to be updated...

shawn · Jul 9, 2026

@sparkfro thanks for trying. Looks like the only source of information is their driver code. Either they don't know what's being asked, they can't talk about it, or it actually doesn't exist.

sparkfro · Jul 9, 2026

Infineon also linked me to this for Bluetooth: https://infineon.github.io/btsdk-docs/BT-SDK/AIROC-HCI-Control-Protocol.pdf

shawn · Jul 9, 2026

sparkfro said:
Infineon also linked me to this for Bluetooth: https://infineon.github.io/btsdk-docs/BT-SDK/AIROC-HCI-Control-Protocol.pdf

That's for their Bluetooth stuff, not the WiFi chip. (Oh, you already say that...)

mjs513 · Jul 9, 2026

Not for nothing but this is the link for the zephy implementation for Infineon airoc control:

https://github.com/zephyrproject-rtos/zephyr/tree/main/drivers/wifi/infineon

Think I posted this before - maybe has some clues

PaulStoffregen · Jul 9, 2026

sparkfro said:
haven't seen requests from any of you, but you've all been active in this thread. Would you each like one?

Thanks, but I should decline. I'm currently working on another project and probably can't do much at this time.

Dogbone06 · Jul 14, 2026

sparkfro said:
We've completed our internal design review and are ready to order prototypes. Want to make sure I have allocations correct:

@shawn 2 for you
@wwatson 1 for you
@defragster 1 for you

@Dogbone06 @PaulStoffregen @KurtE @mjs513 I haven't seen requests from any of you, but you've all been active in this thread. Would you each like one?

Thanks!

Edit - Please PM me with your shipping address.

I'd love one, so fun to see your improvement work on the hardware I started!
How do we proceed? I have you on email, I can send the details there.

Being named by Dogbone06 would be amazing, if I may.
I think the other names should be there as well if possible, I only made the PCB, the rest was done by the fine foaks of this community.

sparkfro · Jul 21, 2026

Ooh, aah, prototype! (we order prototypes in black, final will be red)

@wwatson I downloaded the latest master branch of https://github.com/wwatson4506/QNEthernet_WIFI. I tried the cyw43_scan.ino, but it failed to compile. I see there are a few branches in that repo, which is correct? I also updated to 1.62.0 of Teensyduino, if that helps.

Code:

/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/cyw4343w/src/ping.cpp:10:9: warning: 'EVENT_POLL_USEC' redefined
   10 | #define EVENT_POLL_USEC     500 //200 //100000
      |         ^~~~~~~~~~~~~~~
In file included from /home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/driver_select.h:37,
                 from /home/dryw/Arduino/libraries/QNEthernet_WIFI/src/lwipopts.h:9,
                 from /home/dryw/Arduino/libraries/QNEthernet_WIFI/src/lwip/opt.h:51,
                 from /home/dryw/Arduino/libraries/QNEthernet_WIFI/src/lwip/apps/mdns_opts.h:42,
                 from /home/dryw/Arduino/libraries/QNEthernet_WIFI/src/QNEthernet.h:17,
                 from /home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/cyw4343w/src/event.h:32,
                 from /home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/cyw4343w/src/ping.h:6,
                 from /home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/cyw4343w/src/ping.cpp:3:
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.h:9:9: note: this is the location of the previous definition
    9 | #define EVENT_POLL_USEC    100000 //100000
      |         ^~~~~~~~~~~~~~~
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp:7:51: note: '#pragma message: Using CYW4343W QNEthernet Driver'
    7 | #pragma message("Using CYW4343W QNEthernet Driver")
      |                                                   ^
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp:32:1: error: 'Join' does not name a type
   32 | Join qnjoin;
      | ^~~~
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp: In function 'bool qindesign::network::driver::get_mac(uint8_t*)':
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp:68:6: error: 'qnjoin' was not declared in this scope
   68 |   if(qnjoin.join_check() != JOIN_OK) return false;
      |      ^~~~~~
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp: In function 'bool qindesign::network::driver::set_mac(const uint8_t*)':
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp:74:6: error: 'qnjoin' was not declared in this scope
   74 |   if(qnjoin.join_check() != JOIN_OK) return false;
      |      ^~~~~~
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp: In function 'bool qindesign::network::driver::has_hardware()':
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp:93:3: error: 'WIFIinit' was not declared in this scope
   93 |   WIFIinit(MY_SSID, MY_PASSPHRASE, SECURITY);
      |   ^~~~~~~~
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp: In function 'void qindesign::network::driver::deinit()':
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp:111:3: error: 'qnjoin' was not declared in this scope
  111 |   qnjoin.join_stop();
      |   ^~~~~~
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp: In function 'void qindesign::network::driver::poll(netif*)':
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp:139:5: error: 'qnjoin' was not declared in this scope
  139 |     qnjoin.join_state_poll(MY_SSID, MY_PASSPHRASE, SECURITY);
      |     ^~~~~~
/home/dryw/Arduino/libraries/QNEthernet_WIFI/src/qnethernet/drivers/driver_CYW4343W.cpp:142:21: error: 'qnjoin' was not declared in this scope
  142 |   uint8_t link_up = qnjoin.join_check() ? 1 : 0;
      |                     ^~~~~~
Multiple libraries were found for "QNEthernet.h"
  Used: /home/dryw/Arduino/libraries/QNEthernet_WIFI
  Not used: /home/dryw/Arduino/libraries/QNEthernet_WIFI_0.36.0
exit status 1

Compilation error: exit status 1

defragster · Jul 21, 2026

sparkfro said:
branches in that repo, which is correct?

Last I saw was this on prior forum page:

defragster said:
See branch QNEthernet_WIFI_Clean_Up: https://github.com/wwatson4506/QNEthernet_WIFI/tree/QNEthernet_WIFI_Clean_Up

sparkfro · Jul 21, 2026

Ah! It builds now, thanks!

Changed the WL_REG_ON and WL_IRQ pins, but it's failing to communicate. No idea yet, will dig into it more later, (I need to head home for the day). Probably something simple

Code:

17:12:04.740 -> CPU speed: 600 MHz
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> BUS_IORDY_REG (Ready indication) returned 0
17:12:04.934 -> initialization failed!
17:12:04.934 -> Setup complete
17:12:04.934 ->
17:12:04.934 ->
17:12:04.934 -> ====== STARTING SCAN ======

wwatson · Jul 21, 2026

Sorry - Not sure why it does not compile but the latest version is listed in post #209. This is the link:

GitHub - wwatson4506/QNEthernet_WIFI: A version of QNEthernet Adapted to USE with the CYW4343x WIFI device.

A version of QNEthernet Adapted to USE with the CYW4343x WIFI device. - wwatson4506/QNEthernet_WIFI

github.com

It is based on @shawn's latest version (0.36.0) of QNEthernet. The other two versions are out dated as of 0.36.0.
Nice to see the prototype is ready

EDIT: @sparkfro - Just saw your last post #218. I do not think it will run without changing and setting up the firmware files for the CYW43439. The current firmware is setup for the CYW4343W and is different than the CYW43439. I need the the prototype to do that as I do not have a CYW43439 board. Only the CYW4343W one...

defragster · Jul 21, 2026

sparkfro said:
failing to communicate

That seems to be expected as it is getting a push of firm
ware for the wrong chip?

wwatson · Jul 21, 2026

I do have the PICO 2W which uses the 1YN chip. I have not used it yet But I am in the process of setting up to use it. I also have PICO debug probe so once I figure out how to use those then it should help to debug things if needed...

mjs513 · Jul 23, 2026

wwatson said:
I do not think it will run without changing and setting up the firmware files for the CYW43439. The current firmware is setup for the CYW4343W and is different than the CYW43439. I need the the prototype to do that as I do not have a CYW43439 board. Only the CYW4343W one...

A little behind of forum posts but maybe some clue in these 2 links

GitHub - PicoNexus/pico_wifi_zephyr: Demo for Zephyr + PICO-W with CYW43439 wifi driver

Demo for Zephyr + PICO-W with CYW43439 wifi driver - PicoNexus/pico_wifi_zephyr

github.com

GitHub - soypat/cyw43439: Baremetal, heapless driver for the Wifi+bluetooth integrated circuit on the pico.

Baremetal, heapless driver for the Wifi+bluetooth integrated circuit on the pico. - soypat/cyw43439

github.com

sparkfro · Jul 23, 2026

Okay, finally played with this a bit more today and poked through some code.

defragster said:
That seems to be expected as it is getting a push of firm
ware for the wrong chip?

Yes, that would make sense. Currently, only the CYW4343W (1DX) exists in the repo, no mention of CYW43439 (1YN). So I probably shouldn't expect any of the examples to work right now.

Although I remembered seeing this comment and assuming it might "just work" without any code or firmware changes:

Dogbone06 said:
From what we saw the 1DX and 1YN are identical at least for the WiFi pins. I made the chips with both of them and they seem to work the same.

@Dogbone06 Did you actually get successful WiFi stuff working with the 1YN? If so, mind sharing what you did so I can test with our prototypes to verify they're functioning?

Another update - if I have the prototype board connected, I get this output:

sparkfro said:

Ah! It builds now, thanks!

Changed the WL_REG_ON and WL_IRQ pins, but it's failing to communicate. No idea yet, will dig into it more later, (I need to head home for the day). Probably something simple

Code:

17:12:04.740 -> CPU speed: 600 MHz
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> CMD52 failed
17:12:04.934 -> BUS_IORDY_REG (Ready indication) returned 0
17:12:04.934 -> initialization failed!
17:12:04.934 -> Setup complete
17:12:04.934 ->
17:12:04.934 ->
17:12:04.934 -> ====== STARTING SCAN ======

If I disconnect the board, I instead get this output:

Code:

14:20:24.076 -> CPU speed: 600 MHz
14:20:25.257 -> cardCommand(31a0000, 0) error isBusyCommandInhibit
14:20:26.254 -> cardCommand(71b0000, 0) error isBusyCommandInhibit
14:20:27.252 -> cardCommand(341a0000, 80002020) error isBusyCommandInhibit
14:20:27.252 -> CMD52 failed
14:20:28.250 -> cardCommand(341a0000, 80002200) error isBusyCommandInhibit
14:20:28.250 -> CMD52 failed
14:20:29.252 -> cardCommand(341a0000, 80022040) error isBusyCommandInhibit
14:20:29.252 -> CMD52 failed
14:20:30.256 -> cardCommand(341a0000, 80022200) error isBusyCommandInhibit
14:20:30.256 -> CMD52 failed
14:20:31.255 -> cardCommand(341a0000, 80042000) error isBusyCommandInhibit
14:20:31.255 -> CMD52 failed
14:20:32.255 -> cardCommand(341a0000, 80042202) error isBusyCommandInhibit
14:20:32.255 -> CMD52 failed
14:20:33.259 -> cardCommand(341a0000, 2600) error isBusyCommandInhibit
14:20:33.259 -> CMD52 failed
14:20:34.259 -> cardCommand(341a0000, e00) error isBusyCommandInhibit
14:20:34.259 -> CMD52 failed
14:20:35.261 -> cardCommand(341a0000, 80000e02) error isBusyCommandInhibit
14:20:35.261 -> CMD52 failed
14:20:36.260 -> cardCommand(341a0000, 400) error isBusyCommandInhibit
14:20:36.260 -> CMD52 failed
14:20:37.258 -> cardCommand(341a0000, 80000422) error isBusyCommandInhibit
14:20:37.258 -> CMD52 failed
14:20:38.257 -> cardCommand(341a0000, 400) error isBusyCommandInhibit
14:20:38.257 -> CMD52 failed
14:20:39.256 -> cardCommand(341a0000, 600) error isBusyCommandInhibit
14:20:39.256 -> CMD52 failed
14:20:39.256 -> BUS_IORDY_REG (Ready indication) returned 0
14:20:39.256 -> initialization failed!
14:20:39.256 -> Setup complete
14:20:39.256 ->
14:20:39.256 ->
14:20:39.256 -> ====== STARTING SCAN ======

That doesn't necessarily prove that communication is working, but it is at least somewhat promising that I get different behavior. I would investigate this further, but looks like there's a lot of direct register usage, and I don't really have time right now to dig through register documentation.

I was hoping to verify the prototype hardware is functioning before shipping these out to folks, but I suspect that may not happen without a lot of back and forth (again, I have limited time right now, unfortunately). So might just need to take the risk and ship untested boards. @wwatson (or anyone else) Is there anything you'd like me to test on my end before I ship boards out?

wwatson · Jul 23, 2026

@sparkfro - Actually if there was no communication at all without the WL_REG_ON and WL_IRQ pins pins being changed you would have probably seen the CMD52 errors then.So that is indicating that we do probably have comms with the chip. That's encouraging news

There is a define that turns on a lot of debugging information found in "misc_defs.h" in the "QNethernet_WIFI_0.36.0/src/qnethernet/drivers/cyw4343w/src" directory:

Code:

//==============================================================================
// Un-comment to enable multicast.
//==============================================================================
#define USE_MCAST false

//==============================================================================
// Init Debug Mode. Displays initialization processes.
//==============================================================================
#define INIT_DEBUG_MODE false  <----- set this to true

//==============================================================================
// Warnings
//==============================================================================
#define DEBUG_WARNINGS false

//==============================================================================
// More verbose
//==============================================================================
#define USE_DEBUG_MODE false

//==============================================================================
// Show hidden sites during scan.
//==============================================================================
#define SHOW_HIDDEN false

The output will look something like this:

Code:

Starting...
Please Wait...
===========================
CYW4343W Card::begin: SDIO2
===========================
Attaching OOB interrupt to pin 34
Enabled CYW4343W bus high speed interface
BUS_IORDY_REG (Ready indication) returned OK
SDHC bus set to 4-bit, speed set to 33MHz
Backplane Window set to 0x18000000
*************
CardID: 43430
*************
Backplane Window set to 0x18100000
Set SRAM_IOCTRL_REG validated
Backplane Window set to 0x18000000
Backplane Window set to 0x18100000
Set SRAM_IOCTRL_REG second validation
Set SRAM_RESETCTRL_REG validated
Backplane Window set to 0x18000000
BUS_BRCM_CARDCTRL returned 1
BAK_CHIP_CLOCK_CSR_REG returned 0x48
Backplane Window set to 0x00058000
Uploading firmware data
Backplane Window set to 0x00000000
WL_IRQ OOB Interrupt
Backplane Window set to 0x00008000
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
Backplane Window set to 0x00010000
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
Backplane Window set to 0x00018000
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
Backplane Window set to 0x00020000
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
Backplane Window set to 0x00028000
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
Backplane Window set to 0x00030000
WL_IRQ OOB Interrupt
Backplane Window set to 0x00038000
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
Backplane Window set to 0x00040000
Backplane Window set to 0x00048000
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
Backplane Window set to 0x00050000
Backplane Window set to 0x00058000
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
Backplane Window set to 0x00060000
WL_IRQ OOB Interrupt
Uploaded firmware, 419798 of 419798 bytes
Uploading NVRAM data
Backplane Window set to 0x00078000
Uploaded NVRAM, 586 of 586 bytes
Backplane Window set to 0x18100000
Backplane Window set to 0x18000000
Backplane Window set to 0x18100000
Backplane Window set to 0x18000000
Set BAK_CHIP_CLOCK_CSR_REG validated
Set BUS_IORDY_REG validated
Configuring WL_IRQ OOB
WL_IRQ OOB Interrupt
Backplane Window set to 0x00068000
Backplane Window set to 0x00038000
Backplane Window set to 0x18000000
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
==============================
End W4343WCard::begin: SDIO2
==============================
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
Uploading CLM, size: 7222
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
CLM uploaded 7222/7222 result: 1
WL_IRQ OOB Interrupt
CLM version API: 12.2
Data: 9.10.39
Compiler: 1.29.4
ClmImport: 1.36.3
Creation: 2021-03-28 22:47:33

WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
In joinNetworks
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
WiFi CPU running
WL_IRQ OOB Interrupt
Set country succesfully
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt

No events enabled
WL_IRQ OOB Interrupt
WL_IRQ OOB Interrupt
Join events enabled

At the beginning of the spew of debug info we are looking for something like this:

Code:

Starting...
Please Wait...
===========================
CYW4343W Card::begin: SDIO2
===========================
Attaching OOB interrupt to pin 34
Enabled CYW4343W bus high speed interface
BUS_IORDY_REG (Ready indication) returned OK
SDHC bus set to 4-bit, speed set to 33MHz
Backplane Window set to 0x18000000
*************
CardID: 43430  <---------- If we see something like: CardID: 43439 or similar we probably have good comms with the 1YN chip.
 *************

Hopefully this helps

EDIT: OOPS, two copies of spew...

sparkfro · Jul 23, 2026

Hmm, all I get is this:

Code:

16:04:31.288 -> CPU speed: 600 MHz
16:04:31.288 -> ===========================
16:04:31.288 -> CYW4343W Card::begin: SDIO2
16:04:31.288 -> ===========================
16:04:31.288 -> Attaching OOB interrupt to pin 29
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> CMD52 failed
16:04:31.482 -> BUS_IORDY_REG (Ready indication) returned 0
16:04:31.482 -> initialization failed!
16:04:31.482 -> Setup complete
16:04:31.482 ->
16:04:31.482 ->
16:04:31.482 -> ====== STARTING SCAN ======

Also, that happens regardless of whether I change WL_REG_ON and WL_IRQ pins.

Call to arms | Teensy + WiFi = true

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