I'm using a Teensy 4.0 with the following pin connections:
Teensy pin 2 - EVE4 pin 7 - IRQ
3 - 8 - Reset
10 - 6 - CS
11 - 5 - MOSI
12 - 4 - MISO
13 - 3 - CLK
Teensy 3V3 - EVE4 pin 1
12V PSU - EVE4 pins 17, 18 - BLVDD
Teensy GND - EVE4 pins 2,19,20
I can make the backlight come on and the screen is light blue but can't get even simple colour or text. Comms seems good and I can change registers and read them back as having been changed ok, but nothing goes to the display itself.
I've tried GDTX.h (config.h doesn't seem to have a 12" option to set), Platform.h from Riverdi and a 'bare metal' sketch (below) but no luck with any.
The display is a Riverdi RVT121HVBFWCA0-B
Any help gratefully received
TIA.
Some code that successfully does nothing apart from make the backlight come on:
Some more code that does the blue screen thing as well:
Teensy pin 2 - EVE4 pin 7 - IRQ
3 - 8 - Reset
10 - 6 - CS
11 - 5 - MOSI
12 - 4 - MISO
13 - 3 - CLK
Teensy 3V3 - EVE4 pin 1
12V PSU - EVE4 pins 17, 18 - BLVDD
Teensy GND - EVE4 pins 2,19,20
I can make the backlight come on and the screen is light blue but can't get even simple colour or text. Comms seems good and I can change registers and read them back as having been changed ok, but nothing goes to the display itself.
I've tried GDTX.h (config.h doesn't seem to have a 12" option to set), Platform.h from Riverdi and a 'bare metal' sketch (below) but no luck with any.
The display is a Riverdi RVT121HVBFWCA0-B
Any help gratefully received
Some code that successfully does nothing apart from make the backlight come on:
Code:
#include <SPI.h>
/* Pins */
#define EVE_CS 10
#define EVE_PDN 3
/* EVE base */
#define RAM_REG 0x302000UL
#define RAM_DL 0x300000UL
#define RAM_CMD 0x308000UL
/* REGs */
#define REG_ID (RAM_REG + 0x000)
#define REG_PWM_HZ (RAM_REG + 0x0D0)
#define REG_PWM_DUTY (RAM_REG + 0x0D4)
#define REG_GPIOX_DIR (RAM_REG + 0x090) // bit7
#define REG_GPIOX (RAM_REG + 0x094) // bit7
#define REG_HCYCLE (RAM_REG + 0x02C)
#define REG_HOFFSET (RAM_REG + 0x030)
#define REG_HSYNC0 (RAM_REG + 0x034)
#define REG_HSYNC1 (RAM_REG + 0x038)
#define REG_VCYCLE (RAM_REG + 0x03C)
#define REG_VOFFSET (RAM_REG + 0x040)
#define REG_VSYNC0 (RAM_REG + 0x044)
#define REG_VSYNC1 (RAM_REG + 0x048)
#define REG_HSIZE (RAM_REG + 0x04C)
#define REG_VSIZE (RAM_REG + 0x050)
#define REG_OUTBITS (RAM_REG + 0x05C)
#define REG_DITHER (RAM_REG + 0x060)
#define REG_SWIZZLE (RAM_REG + 0x064)
#define REG_CSPREAD (RAM_REG + 0x068)
#define REG_PCLK_POL (RAM_REG + 0x06C)
#define REG_PCLK (RAM_REG + 0x070)
#define REG_CMDB_WRITE (RAM_REG + 0x0FC)
#define REG_CMDB_SPACE (RAM_REG + 0x574)
/* Host commands */
#define HCMD_ACTIVE 0x00
#define HCMD_CLKEXT 0x44
#define HCMD_CLKSEL 0x61
#define HCMD_PCLK 0x70
/* Co-proc */
#define CMD_DLSTART 0xFFFFFF00UL
#define CMD_SWAP 0xFFFFFF01UL
/* DL macros */
#define DL_CLEAR_COLOR_RGB(r,g,b) (0x02000000UL | ((uint32_t)(r)<<16) | ((uint32_t)(g)<<8) | (b))
#define DL_CLEAR(c,s,t) (0x26000000UL | ((c?1:0) | ((s?1:0)<<1) | ((t?1:0)<<2)))
#define DL_DISPLAY() (0x00000000UL)
SPISettings eveSPI(1000000, MSBFIRST, SPI_MODE0); // 1 MHz for bring-up
/* SPI helpers */
static inline void eveBegin(){ SPI.beginTransaction(eveSPI); digitalWrite(EVE_CS, LOW); }
static inline void eveEnd(){ digitalWrite(EVE_CS, HIGH); SPI.endTransaction(); }
void eveHostCmd(uint8_t cmd, uint16_t data=0){
eveBegin(); SPI.transfer(cmd); SPI.transfer(lowByte(data)); SPI.transfer(highByte(data)); eveEnd();
}
void eveWrite8 (uint32_t a, uint8_t v){
eveBegin(); SPI.transfer(((a>>16)&0x3F)|0x80); SPI.transfer((a>>8)&0xFF); SPI.transfer(a&0xFF);
SPI.transfer(v); eveEnd();
}
void eveWrite16(uint32_t a, uint16_t v){
eveBegin(); SPI.transfer(((a>>16)&0x3F)|0x80); SPI.transfer((a>>8)&0xFF); SPI.transfer(a&0xFF);
SPI.transfer(lowByte(v)); SPI.transfer(highByte(v)); eveEnd();
}
uint8_t eveRead8(uint32_t a){
eveBegin(); SPI.transfer((a>>16)&0x3F); SPI.transfer((a>>8)&0xFF); SPI.transfer(a&0xFF);
SPI.transfer(0x00); uint8_t v=SPI.transfer(0x00); eveEnd(); return v;
}
uint32_t eveRead32(uint32_t a){
eveBegin(); SPI.transfer((a>>16)&0x3F); SPI.transfer((a>>8)&0xFF); SPI.transfer(a&0xFF);
SPI.transfer(0x00);
uint32_t b0=SPI.transfer(0x00), b1=SPI.transfer(0x00), b2=SPI.transfer(0x00), b3=SPI.transfer(0x00);
eveEnd(); return (b0 | (b1<<8) | (b2<<16) | (b3<<24));
}
/* CMDB */
static uint16_t cmdb_wptr=0;
void cmdb_reset(){ cmdb_wptr=0; }
void cmdb_write32(uint32_t v){ eveWrite32(RAM_CMD+cmdb_wptr, v); cmdb_wptr=(cmdb_wptr+4)&0x0FFF; }
void cmdb_flush(){ eveWrite32(REG_CMDB_WRITE, cmdb_wptr); }
void eveWrite32(uint32_t a,uint32_t v){
eveBegin(); SPI.transfer(((a>>16)&0x3F)|0x80); SPI.transfer((a>>8)&0xFF); SPI.transfer(a&0xFF);
SPI.transfer(v&0xFF); SPI.transfer((v>>8)&0xFF); SPI.transfer((v>>16)&0xFF); SPI.transfer((v>>24)&0xFF); eveEnd();
}
void dumpKey(const char* tag){
Serial.println(tag);
Serial.printf("HCYCLE=%u HSIZE=%u HOFF=%u HSYNC0/1=%u/%u VCYCLE=%u VSIZE=%u VOFF=%u VSYNC0/1=%u/%u\n",
(unsigned)eveRead32(REG_HCYCLE), (unsigned)eveRead32(REG_HSIZE), (unsigned)eveRead32(REG_HOFFSET),
(unsigned)eveRead32(REG_HSYNC0), (unsigned)eveRead32(REG_HSYNC1),
(unsigned)eveRead32(REG_VCYCLE), (unsigned)eveRead32(REG_VSIZE), (unsigned)eveRead32(REG_VOFFSET),
(unsigned)eveRead32(REG_VSYNC0), (unsigned)eveRead32(REG_VSYNC1));
Serial.printf("SWIZZLE=%lu CSPREAD=%lu OUTBITS=%lu DITHER=%lu PCLK_POL=%lu PCLK=%lu GPIOX_DIR=0x%02lX GPIOX=0x%02lX CMDW=%lu\n",
eveRead32(REG_SWIZZLE), eveRead32(REG_CSPREAD), eveRead32(REG_OUTBITS), eveRead32(REG_DITHER),
eveRead32(REG_PCLK_POL), eveRead32(REG_PCLK),
(unsigned long)eveRead32(REG_GPIOX_DIR), (unsigned long)eveRead32(REG_GPIOX),
eveRead32(REG_CMDB_WRITE));
}
void setup(){
pinMode(EVE_CS, OUTPUT); digitalWrite(EVE_CS, HIGH);
pinMode(EVE_PDN, OUTPUT);
Serial.begin(115200); delay(300);
SPI.begin();
Serial.println("\nBT81x: Riverdi RED via CMDB");
// Reset
digitalWrite(EVE_PDN, LOW); delay(40);
digitalWrite(EVE_PDN, HIGH); delay(120);
// Wake, keep PCLK OFF
eveHostCmd(HCMD_ACTIVE); delay(20);
eveHostCmd(HCMD_CLKEXT); delay(20);
eveHostCmd(HCMD_CLKSEL, 1); delay(20);
eveHostCmd(HCMD_PCLK, 0); delay(20);
// ID must be 0x7C
uint8_t id = eveRead8(REG_ID);
Serial.printf("REG_ID=0x%02X (expect 0x7C)\n", id);
if (id != 0x7C) { Serial.println("No BT81x ID; check wiring."); while(1){} }
// Gate panel/backlight ON via GPIOX
eveWrite8 (REG_GPIOX_DIR, 0x80); // bit7 dir
eveWrite8 (REG_GPIOX, 0x80); // bit7 high
eveWrite16(REG_PWM_HZ, 1000);
eveWrite8 (REG_PWM_DUTY, 96);
// Timings (1650/828, offsets 150/33), SWIZZLE=0, POL=1
eveWrite16(REG_HCYCLE, 1650);
eveWrite16(REG_HSIZE, 1280);
eveWrite16(REG_HOFFSET, 150);
eveWrite16(REG_HSYNC0, 0);
eveWrite16(REG_HSYNC1, 40);
eveWrite16(REG_VCYCLE, 828);
eveWrite16(REG_VSIZE, 800);
eveWrite16(REG_VOFFSET, 33);
eveWrite16(REG_VSYNC0, 0);
eveWrite16(REG_VSYNC1, 10);
eveWrite8 (REG_SWIZZLE, 0);
eveWrite8 (REG_CSPREAD, 1);
eveWrite8 (REG_OUTBITS, 0);
eveWrite8 (REG_DITHER, 1);
eveWrite8 (REG_PCLK_POL, 1);
// Pixel clock ON (div=2), then build DL via CMDB
eveWrite8 (REG_PCLK, 2);
delay(50);
cmdb_reset();
cmdb_write32(CMD_DLSTART);
cmdb_write32(DL_CLEAR_COLOR_RGB(255,0,0));
cmdb_write32(DL_CLEAR(1,1,1));
cmdb_write32(DL_DISPLAY());
cmdb_write32(CMD_SWAP);
cmdb_flush();
dumpKey("After program (expect RED):");
}
void loop(){ delay(1000); }
Code:
#include <GDSTx.h>
int MCUID;
void setup()
{
GD.begin();
IDEMCU();
}
void loop()
{
GD.ClearColorRGB(0x100020);
GD.Clear();
GD.cmd_text(GD.w / 2, GD.h / 2, 31, OPT_CENTER, "Hello world");
GD.Begin(LINES);
GD.ColorRGB(255,255,255);
GD.Vertex2f(0*16, 0*16); GD.Vertex2f((GD.w)*16, 0*16); //Superior
GD.Vertex2f(0*16, (GD.h-1)*16); GD.Vertex2f((GD.w)*16, (GD.h-1)*16); //inferior
GD.Vertex2f(0*16, 0*16); GD.Vertex2f(0*16, (GD.h-1)*16); //izquierda
GD.Vertex2f((GD.w-1)*16, 0*16); GD.Vertex2f((GD.w-1)*16, (GD.h-1)*16); //derecha
Parametros();
GD.swap();
}