Custom Teensy 3.6/2.0 Board Feedback


New member
Hello all,

I've been working on a board that runs two MK66s and an ATMEGA32U4, with schematics based off the Teensy 3.6 and 2.0 respectively. On the first revision of the board the 32U4 worked great, but neither of the MK66s were showing up as available over USB. I noticed that I never connected VREG_OUT on the MK66s which I have since remedied in EAGLE, but I was hoping that some of you more experienced guys and gals could let me know if there are any other obvious issues that I need to fix before I get the second revision of the boards manufactured. I've run through the list of issues identified on the MKL02/04 page and tried to avoid those. Attached below are the PDFs of the schematic and board, along with the files themselves if the PDFs aren't clear

In testing, I've verified that the Reset and Program signals are being sent low when the button is pressed. I attempted to remedy the VREG_OUT issues by sliding a very thin piece of wire under the BGA and soldering it to G1, and connecting the other end to 3.3V, but this didn't change anything. This could indicate that there is another issue that I need to solve, or that my very crude method of tying that pin high was ineffective. I also found that I need to move the SYSCLK line from pin 22 of the 32U4 to pin 12 which is a change yet to be made on the schematic, but shouldn't affect the MK66s.

A little bit of background on the project, I have 3 separate workloads that I need to handle on a UAV, and these are distributed between the three MCUs. I could definitely do all of this with just a single, faster MCU, but getting them to talk to each other is a hardware/software challenge that I've never tackled before and I am learning a lot. My background is in astronautical engineering, and I'm getting to apply a lot of the methods used in satellite comms on a smaller scale which is neat. Any feedback on the schematic or board would be greatly appreciated!


Signal layers 1 and 4:
View attachment G4.2SA.pdf

View attachment G4.2SA_SCH.pdf

Layer 1 and GND plane:
View attachment G4.2SA_GND.pdf

Power plane and layer 4:
View attachment G4.2SA_PWR.pdf

EAGLE files:
View attachment
Wow, that's a huge schematic sheet.

Everything looks reasonable, but it's always hard to notice what's not shown with this format there it's mostly just chips with a few parts and net names attached to pins for most of the design's connectivity.