Fast 24-Bit Dual-Channel ADC Project for Teensy 4.1 (2MSPS, DMA)

S

StanfordEE

Well-known member
Folks,
We are engaged in a project to build (with help from Analog Devices) a board for Teensy 4.1 that brings a 2MSPS, 24-bit, dual-channel to the community (true to specs, with proper input buffers and power). This might sound easy, but meeting such performance specs is daunting and we may fail, since we are going for the lowest realistic price-point.

The dynamic range is mind-numbing and this is truly a state-of-the-art ADC. The designer of the ADC is working with us. Wow.

We are committed to the basic concept and will make all of the code open (the chip is 4-lane serial, similar to QSPI) and we will use DMA for gapless acquisition. But we are just going to do a basic board - no fancy variants.

In light of that, any comments, ideas, thoughts?

Thanks,
Greg
 
Absolutely. The AD4630-24 is the $42 (1kU) version, but we are planning to start with the AD4632-24 (500kSPS) and 1/2 the price. Target is actually 1MSPS since it allows much more time for input amplifier settling and should yield better performance in terms of the details we are looking at. The physical design is non-trivial because the LSB is 244nV (!).

We are in no rush, but prototyped it and implemented multirate downsampling - the whole thing will be released when the hardware is done.

As I'm sure you know, no physical antialiasing filter can meet spec for, say, a 250kHz displayable FFT bandwidth (having to drop about 120dB by Nyquist at, say 1MSPS), so the input filtering will likely be up to the user for the first revision, and some folks assume clean input signals and display all the way to Nyquist.
 
That really sounds like an interesting board. I don't think anything like that exists as add-on yet, does it? I'd really appreciate more information.
 
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SAR with no missing codes at 24 bit sounds great, but what about sparkle codes? Is that what the "transition noise 29.7 LSB rms" is implying? Is that saying 19 usable bits?
 
StanfordEE said:
Folks,
We are engaged in a project to build (with help from Analog Devices) a board for Teensy 4.1 that brings a 2MSPS, 24-bit, dual-channel to the community (true to specs, with proper input buffers and power). This might sound easy, but meeting such performance specs is daunting and we may fail, since we are going for the lowest realistic price-point.

The dynamic range is mind-numbing and this is truly a state-of-the-art ADC. The designer of the ADC is working with us. Wow.

We are committed to the basic concept and will make all of the code open (the chip is 4-lane serial, similar to QSPI) and we will use DMA for gapless acquisition. But we are just going to do a basic board - no fancy variants.

In light of that, any comments, ideas, thoughts?
For a fast 24-bit ADC project, I would pay close attention to the SPI interface, DMA buffering, clock stability, and data throughput at 2 MSPS. Jotrin could be useful as a sourcing reference when comparing ADCs or supporting components, but I would verify the exact part specifications and availability against the manufacturer datasheet.
Thanks,
Greg
Click to expand...
This sounds like a really interesting project, especially with the focus on proper buffering, power design, and DMA for gapless acquisition. Keeping the hardware straightforward and the code open should also make it much more useful to the community. Looking forward to seeing the results.
 
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