I am experiencing a hard freeze on Serial1 reception whenever an external SPI module goes active, and after trying several software fixes, I suspect it might be a hardware or low-level core conflict.
The Hardware Setup:
What I Have Already Tried (Software Fixes Failed):
Since software-level ISR management didn't fix this, I am looking for hardware or low-level insights:
The Hardware Setup:
- Master: Teensy 3.6
- Slave: Teensy 3.6
- Comms 1 (Master to Shield): Master has an EasyCAT (EtherCAT) shield communicating via SPI. When my ROS network starts, the shield pulses a hardware interrupt on Pin 2 at 1kHz (every 1ms).
- Comms 2 (Slave to Master): Master listens to the Slave via Serial1 (Pins 0/1) at 2,000,000 baud. The Slave sends 16-byte payloads of encoder data.
What I Have Already Tried (Software Fixes Failed):
- Lowering the Baud Rate: I dropped the baud rate from 2,000,000 down to 250,000. It did not solve the freeze.
- Removing ISR Blocking (The Flag Method): I initially had the heavy SPI transfers running directly inside the Pin 2 ISR. I rewrote the code so the ISR only flips a volatile bool flag, moving all the SPI processing into the main loop() to avoid starving the CPU. This did not fix the issue.
- Removing Handshakes: I removed all while(timeout) blocking loops from the UART parsing logic.
C++:
#include <SPI.h>
#include "EasyCAT.h"
EasyCAT EASYCAT(9, DC_SYNC);
const byte EtherCAT_InterruptPin = 2;
void setup() {
Serial1.begin(2000000); // Slave UART
attachInterrupt(digitalPinToInterrupt(EtherCAT_InterruptPin), EtherCAT_DC_ISR, FALLING);
}
void loop() {
// Flag method did not solve the freeze,
// currently returning to direct ISR calls or polling in loop.
tickCountDownload(); // My function to read Serial1.available()
}
void EtherCAT_DC_ISR() {
// Even if I move these to the loop() using a flag, Serial1 still freezes when 1kHz traffic starts
EASYCAT.MainTaskP1();
updateMotors();
EASYCAT.MainTaskP2();
}
Since software-level ISR management didn't fix this, I am looking for hardware or low-level insights:
- Hardware/Electrical: Could the EasyCAT shield going fully active at 1kHz be causing a current spike, ground bounce, or electrical noise that is temporarily disabling the Serial1 RX hardware?
- Core Conflicts: Is there a known low-level conflict on the Teensy 3.6 MK66FX1M0 between the SPI clock generation and the UART1 (Serial1) interrupts or DMA channels?
- Hardware Serial Buffers: Does a 1kHz external interrupt natively block the background UART buffer filling on Teensy 3.6, even if the ISR is incredibly short?