Help with custom Teensy 3.2

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yeahtuna

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Hi,

I’ve been using Teensys for the past few years in variety of products and projects. Currently my designs use custom PCBs with the Teensy footprint in them and I simply solder the Teensy on top of my boards. This method has served me well, but I’m running into issues with the micro USB connector not being durable enough, so I feel its time to take the next step and integrate the Teensy directly into my PCB.

Being my first design, I was hoping experienced and wise eyes might help me avoid making rookie mistakes. To get me started, I read everything I could here:

https://www.pjrc.com/store/ic_mkl02.html

I decided to use this project to get me started.
https://github.com/thewknd/teensy-boards/tree/master/Teensy 3.2 reference board clone

That design is for a 4-layer board, but mine will only be two layers. I started out by deleting everything from the schematic that my board wouldn’t need. Next, I trash the board included in the project and just starting building my own from the schematic. Here’s what I’ve got so far. It’s a rough draft and I was hoping for some feedback and answers to questions to make sure I’m on the right track.
pcb1.jpg

The first question is about my crystals. I haven’t routed any signal under them and I’ve kept them pretty close to the main chip. The traces for the larger crystal are running under a bunch of other traces which are digital outputs. I just want to make sure that’s not a NO-NO.

crystals.png

Related to this picture is the 220 ohm resistor array. The data sheet for these resistors say that each element is rated for 125Mw. At times, these will be shorted to ground and I just want to confirm that they can handle that. I believe I just need to calculate 3.3 / 220 = 0.015?

power.jpg

The highlighted net here is the regulated 3.3 volts. I’ve connected it up as much as possible with 24 mil traces, but I’m worried that it might to be too long. Do I need to try to make it shorter? If I do, what components can I safely move toward the outside of the board?

Because I will only be powering the device with USB, it looks like this BAT54 (R7) won’t be necessary. Can anyone suggest the appropriate replacement diode?

diode.png

Thank-you in advance for any help or suggestions you can offer. I'm really looking forward to getting my first board up and running.

Regards,
Rob
 
FWIW, I would change a number of things because I am a bit retentive when it comes to PCB design.
Board-7.2.jpg
This is the bottom half under a custom board. Note:
1) only one PCB trace crosses another on the b side (that's the only crossing for the whole board)
2) individual decoupling caps are close to each power pin
3) Decoupling caps are between the power pin and the power supply
4) Unbroken ground plane with exception of 1)
5) No traces under the crystal, no ground power flows through crystal GND area (i.e. islanded other than stub connecting it to the GND pin under the MCU)
6) Fat 0-Ohm jumper carries power over the MKL02 data lines, ditto for the RST signal.
7) in this design, I sacrifice two I/O to bring power to the "inside" of the MCU. This is not necessary. Later designs simply use more jumper chips.

I am a firm believer in creating power "grids" on one PCB side where power has multiple ways of getting from the source to the destination, with bulk storage chips sprinkled near high power-draw devices like SD cards. It also lessens the chance that a long trace will start to act like an antenna. The other PCB side is a unbroken GND plane. It ensures a good return path for all signals (see difference in behavior re: high speed vs. low speed signals in online EMI guides).
 
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Saw your question re the crystal and you definitely violated the rules of engagement by running data lines across the crystal lines. Don't be silly. Buy the same chip as pjrc and put it in the same place. That allows you to drop the capacitors and you gain the benefit of a known good configuration.

Messed up crystal lines is one of the main reasons that a custom teensy design will not work.
 
Thanks for the all the feedback. I realise my rough draft here is really rough, so I appreciate all the feedback I can use to make it better. Regarding the crystal, it's the one that was included in the schematic I started with. I'll look for the one PJRC uses. I really want to jettison anything that isn't needed, and if that lets me turf those capacitors, then that's awesome. Do you happen to know the part number? I'll post an update in a couple days.

Any suggestions for the diode I was talking about?
 
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No diode needed, connect 3.3V to pin 21 (VBAT). Keep the capacitor close to the microcontroller pin.
 
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I'd like to thank anyone who has provided me with their invaluable feedback. I've implemented as many of suggestions as I could, and I think I've managed to make significant improvements, but I still have some concerns.

How do I make the ground plane islands in Eagle? I still need to research this.

Are the crystals close enough? As I couldn't manage to find a part number for the QFN crystal on the PJRC boards, I just stuck with the one included in the reference board.

What about that trace I have routed under the power lines inside the micro-controller footprint? Can I get away with doing that?

Here are some pics:
board2.jpgn12.jpg
 
polygon / ground plane in eagle 7.7:
  • select the Polygon tool
  • paint a polygon in the pcb designer
  • to connect it with an already existing signal, like GND: right click on the polygon border and select Name, enter the signal name (the polygon must include one pin or pad with the same signal)
  • right click on the polygon border and select Properties, set a value for Width. Must be higher than the minimum trace width. for oshpark 2 layer: >= 6 mil, 4 layer >= 5 mil
  • select Ratsnest to fill the polygon

Crystals are close enough, Teensy 3.X 16 MHz crystal: https://forum.pjrc.com/threads/4115...eensy-3-2-uses?p=128797&viewfull=1#post128797
 
FWIW, I use this crystal: http://www.digikey.com/product-detail/en/ndk/NX2520SA-16.000000MHZ-W1/644-1093-1-ND

Here is a sample layout of the chip.
Clipboard01.jpg
Note: VBAT and RegOut do not get decoupling caps, they don't need them.
If you don't plan on using the ADC, you can skip the power-cleaning ferrite and all that also.
You can see a grid of jumpers around the MCU to deliver power from all quadrants.
The MKL02 is at the bottom. A simple pushbutton activates the thing.
 
FWIW, the above circuit uses a external voltage regulator, just like your layout. Note how there is a single signal on the b-plane, i.e. a little jumper under the MKL02. The rest of the board does the same thing.
I used a vertical USB connector in this layout.
 
You board is so well laid out. Looks amazing. Do all those extra pours on the top layer help reduce noise?

I realized that I don't need that RTC crystal, so that has made things a lot easier to deal with. I suspect I don't need that regulator either--at least not for this board. I have another similar one to do that will draw more power. I'll leave it in there for now, as I'm not exactly sure how to change the schematic to use the MPC's regulator.

Here's where I'm at now. I've added that crystal and managed to get a ground plane for it. I've also sneaked a track through that resistor network for the digital outputs. Do you know if that's going to be okay?
board3.jpgboard4.PNG
 
yeahtuna said:
You board is so well laid out. Looks amazing. Do all those extra pours on the top layer help reduce noise?
Click to expand...
I don't have the means to test that. The hope is yes. I like to give GND multiple vias from each polygon in case the board house screws up and one of them isn't connected.

You can eliminate the two via lines in the bottom of the board. Run a power line to the left of the USB connector down to the MKL04. Then you don't need the via at 7 o'clock relative to the MCU.
Similarly, you can eliminate the via on the right of the MKL02 by running the two data lines under the pushbutton switch.
I would not be changing the sizes of your data lines. Keep them consistent and within spec re: the board house (check via DRU file).
Crystal looks much better and omission of RTC helps.

What's the benefit of your signal traces to the DK1799 connections. Why one signal via RN network, the other direct? What is a DK1799B connector?
Re-arranging signal lines on the MCU could very well eliminate the need for the two vias up there.
 
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About an hour after posting that, I realised the exact same thing in regards to routing that data line under the push button. Here's the final version. Now it's time to do some shopping! Thank-you so much for your guidance Constantin. While my wife wasn't so pleased with the amount of time I had to put into this, I certainly pleased with the result.

I'll let you know how it all goes down when I get the boards from OSHPark in a few weeks from now. As for the signal / power traces, that a secret!

Regards,
Rob
board6.jpg
 
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It turns out a made mistake with connecting one of the traces to the wrong pin. Unfortunately I already ordered the boards, so it's not going to be totally functional. To be honest, if works at all I'm be quite pleased.

I'll comment a tiny bit on those dual traces. At times the analog / digital traces pins will be set to INPUT_PULLUP, giving me a tiny little resistor that I can turn on and off.

Rob
 
Best of luck. I hope that the resistances you're looking for are consistent enough from channel to channel to be useful.
 
So I'm now starting to think about panelization in an effort to properly dimension my boards to ensure high yield and ease of fabrication.

Because of the irregular shape, I realize that I need some tab routing. I'm just not sure how little of it I can get away with. On the sides of the panels there will be 9mm assembly rails. Is acceptable if the routing cuts into this about 1.25 mm (radius of the routing bit). I've attached an image of what I'm hoping to achieve.

View attachment 10122panel setup.PNG
 
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Opps. I guess I'll need an extra 2.5mm top and bottom for routing there as well....Updated.
 
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First work on the fuctionality of your board. Panelization is the very last step and requires communication with the board house, negotiating vscore pricing etc. etc.
 
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