Ideas on a T4 parallel library using FlexIO

A minor bugfix / issue with the code easone posted.

Right at the very end there is the line:
    /* Enable FlexIO with fast access */


From the user manual "Fast access - Enables fast register accesses to FlexIO registers, but requires the FlexIO functional clock to be at least two times faster than the frequency of the bus clock.".
The bus clock is 150 MHz, the code is setting the FlexIO clock to 120 MHz.

This looks to still work most of the time but I've been getting occasional lockups (very occasional, as in once every 2 GBytes of output) where the FlexIO Active flag isn't cleared at the end of the transfer. I've not seen this issue since disabling fast access. It's rare enough that I wouldn't way to say 100% this was the issue but it is looking that way.

In my code I've simply removed the code to set that option but setting it based on the ratio of FlexIO clock and F_BUS_ACTUAL would be simple enough to do if needed.