Increase the EEPROM memory by M95P16-I M95P16-E
- Thread starter Thisara
- Start date
defragster
Senior Member+
That suggests it can do QSPI Quad access and has a 4x2 package - as long as it uses common pin ordering.
EEPROM's are meant to mount on the larger 2nd footprint area.
That is a new part not currently supported? It would take adding configuration details into the CORES code for use.
PaulStoffregen
Well-known member
I'm going to go with answers: no and probably not, but maybe.
First, no, chips added to the bottom of Teensy 4.1 aren't ever accessed as EEPROM. They are used with LittleFS as a filesystem. Maybe that can be useful, but if you're expecting it to be used as the EEPROM library, that definitely will not happen no matter what chip to use.
So regarding whether this M95P16 chip can be used with LittleFS, I'm going to answer: probably not right out of the box, but maybe with some fiddling. There are 2 likely issues. The main problem is the clock speed. I believe we're using 88 MHz as the default, though there's been quite a bit of talk about wanting 132 MHz. This chip shows 3 maximum clock speeds on the first page, 50 and 80 MHz. If might be possible to use if you slow the clock, but the default clock will probably be too fast. There's also the small matter of editing LittleFS chip detection code to recognize this chip. That's probably doable with some fiddling, as I see it supports the JEDEC ID command (page 21, 37). You'd have to figure out what response it give and edit the table of known chips. Commands look like other chips, so odds are good it can work if you get the clock slow enough and get past detecting the hardware.
First, no, chips added to the bottom of Teensy 4.1 aren't ever accessed as EEPROM. They are used with LittleFS as a filesystem. Maybe that can be useful, but if you're expecting it to be used as the EEPROM library, that definitely will not happen no matter what chip to use.
So regarding whether this M95P16 chip can be used with LittleFS, I'm going to answer: probably not right out of the box, but maybe with some fiddling. There are 2 likely issues. The main problem is the clock speed. I believe we're using 88 MHz as the default, though there's been quite a bit of talk about wanting 132 MHz. This chip shows 3 maximum clock speeds on the first page, 50 and 80 MHz. If might be possible to use if you slow the clock, but the default clock will probably be too fast. There's also the small matter of editing LittleFS chip detection code to recognize this chip. That's probably doable with some fiddling, as I see it supports the JEDEC ID command (page 21, 37). You'd have to figure out what response it give and edit the table of known chips. Commands look like other chips, so odds are good it can work if you get the clock slow enough and get past detecting the hardware.
I need none violative memory that can access with address. Do you think I can use flash chip for storage and access via address.?