Interfacing fast external ADC

S

sreenath

Member
Hi All,
I am new to Teensy world. I am working on a project where I have to interface Teensy 4.1 with a fast (40 msps) pipelined ADC, something like AD9226. We have to generate a clock at the rate we want to sample and the device will output the value (there is a pipeline delay, which can be handled in s/w) The sampling will be in bursts with enough time gap in between the bursts to process the data and write frame buffer for displaying.

From my understanding of the imxrt1602 device, there are no parallel ports that can be directly used. I could be wrong.
I will be reading total 16 bits of data (eight bits in each channel, both clocked together)

I was wondering if it would be possible to use the FlexIO to generate a reasonably symmetric 40 mhz clock and read the adc device output?
The other device I am considering is rp2350 (raspberry pico) but if I run into processing power issues, Teensy with its significantly higher speed and more memory would be very good to have. Also the graphics capability of Teensy.

Any help greatly appreciated,
-Sreenath
 
Thanks for your response. I have downloaded the git repository. I guess I will use dma if necessary to read the adc data.
 
The FLEXIO3 instance used on the T4.1 does not support DMA unfortunately
And FlexIO 1 and 2 don not have enough pins for a 16 bit bus.

You might be able to chain 1 & 2 together with DMA to capture all 16 bits async - similar to how it’s done in OctoWS2811 library
 
I can do without DMA by doing a blocking read, but 16 bits input is a minimum. Even two separate 8 bit ports are fine as long as I can generate a 40 mhz clock on a separate pin and read the two ADC outputs (each 8 bits) after low-to-high transaction of the clock.
Thanks for the information.
 
With FlexIO3 you have 16 pins + a clock pin
You can read 4 bytes from each channel into 4 FlexIO buffers, then get the interrupt to process them or copy them else where for processing later
 
I am checking the reference manual IMXR1060RM, and see that FlexIO has 32 pins assigned. I am getting a Teensy 4.1 board and hopefully make it work.
Thanks again,
Sreenath
 
When Teensy runs at 600 MHz, most of the peripherals clock at 150 MHz. So the PWM and other timers which can create waveforms tend to be able to only give you integer division of 150 MHz. You could easily get 37.5 MHz, but not 40 MHz with the default speed. But you could try configuring a custom overclock speed, running the CPU at 640 MHz so the peripherals run at 160 MHz.
 
The FlexIO peripheral clock can run at 480Mhz (although PLL3/2 is what the RM suggests)
And the bus pulse width can be as high as FlexIO peripheral clock/2
In my FlexIO display driver I can get a 40Mhz baud rate using peripheral clock of 240MHz and a baud rate divider of 6.
((480/2)/6)
 
A jump from 600 to 640 MHz, if at all necessary, hopefully will not damage the device on long run. I have started reading the annotated Ref Manual. It will be quite some time before I will attempt a hello world type of example.
Thanks for all the help.
 
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