Is there a CLKO pin on the Teensy4/4.1 ?
- Thread starter Rolfdegen
- Start date
The ATmega328 has no CLKO, it will accept an input clk into XTAL1 pin, limit 16MHz. There is no system clock output. You can generate 8MHz on some of the GPIO pins using suitably programmed PWM.
150MHz is a lot, more than is sensible for breadboarding, you'd be using controlled impedance traces and matched termination on a PCB design, but I doubt the T4 can drive such a line anyway. IIRC the GPIO clock on the T4 is a lot lower than the system clock (perhaps 150MHz for a 600MHz system clock), which would limit output frequency using PWM to 75MHz. More than 150MHz sounds unlikely to me.
150MHz is a lot, more than is sensible for breadboarding, you'd be using controlled impedance traces and matched termination on a PCB design, but I doubt the T4 can drive such a line anyway. IIRC the GPIO clock on the T4 is a lot lower than the system clock (perhaps 150MHz for a 600MHz system clock), which would limit output frequency using PWM to 75MHz. More than 150MHz sounds unlikely to me.
PaulStoffregen
Well-known member
The IMXRT1062 chip on Teensy 4.0 and 4.1 does have hardware to output 2 of many internal clocks. It's controlled by the CCM_CCOSR register documented on page 1074 in the reference manual. Writing to CCM_CCOSR causes it to "output" clocks to 2 internal signals inside the chip named CCM_CLK01 and CCM_CLK02.
Some of the faster clocks are divided by 2. See the info on pages 1074-1075 for the list of possbile clocks. Perhaps most useful for a general programmable clock output might be the video PLL (div by 2). For example code to control this PLL, look for setClockUsingVideoPLL() in the FlexIO_t4 library, in FlexIO_t4.cpp at line 615.
To actually get these signals to pins, you need to write to the IOMUX registers. Unfortunately NXP didn't give a lot of options for which pins can actually output the CCM_CLK01 and CCM_CLK02 signals. I believe your only choices are GPIO_SD_B0_04 and GPIO_SD_B0_05. These are connected to the SD card, which means accessing tiny bottom side pads on Teensy 4.0 or using an adaptor PCB to plug into the SD socket on Teensy 4.1.
To configure these pins to output the clocks, you would write to registers IOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_04 and IOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_05 which are documented on page 540 and 541. You might also try writing to the corresponding "PAD" registers IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_04 and IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_05 for options that (maybe) help with high bandwidth requirement. Also consider adding a series resistor located close to Teensy for the sake of signal quality.
While not helpful for your need to access a fast clock, for the sake of completeness (and people who later find this message by search) the hardware can also output the 24 MHz and 32.768 kHz crystal clocks on specific pins. To find those in the reference manual, search for REF_CLK_24M and REF_CLK_32K. You don't need to write to any CCM registers, since those 2 internal signals are clocked simply by having the crystals oscillating. Just write to any of the IOMUXC_SW_MUX_CTL_PAD_GPIO registers which have those signals available. For example:
Some of the faster clocks are divided by 2. See the info on pages 1074-1075 for the list of possbile clocks. Perhaps most useful for a general programmable clock output might be the video PLL (div by 2). For example code to control this PLL, look for setClockUsingVideoPLL() in the FlexIO_t4 library, in FlexIO_t4.cpp at line 615.
To actually get these signals to pins, you need to write to the IOMUX registers. Unfortunately NXP didn't give a lot of options for which pins can actually output the CCM_CLK01 and CCM_CLK02 signals. I believe your only choices are GPIO_SD_B0_04 and GPIO_SD_B0_05. These are connected to the SD card, which means accessing tiny bottom side pads on Teensy 4.0 or using an adaptor PCB to plug into the SD socket on Teensy 4.1.
To configure these pins to output the clocks, you would write to registers IOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_04 and IOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_05 which are documented on page 540 and 541. You might also try writing to the corresponding "PAD" registers IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_04 and IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_05 for options that (maybe) help with high bandwidth requirement. Also consider adding a series resistor located close to Teensy for the sake of signal quality.
While not helpful for your need to access a fast clock, for the sake of completeness (and people who later find this message by search) the hardware can also output the 24 MHz and 32.768 kHz crystal clocks on specific pins. To find those in the reference manual, search for REF_CLK_24M and REF_CLK_32K. You don't need to write to any CCM registers, since those 2 internal signals are clocked simply by having the crystals oscillating. Just write to any of the IOMUXC_SW_MUX_CTL_PAD_GPIO registers which have those signals available. For example:
Code:
// REF_CLK_24M pins: (page 1132)
// GPIO_AD_B0_01 ALT2 not connected
// GPIO_AD_B0_03 ALT6 Pin 0 <--- use this pin
// GPIO_AD_B0_13 ALT7 Pin 25
IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_03 = 6;
// Output 32 kHz to test pad on bottom side of Teensy 4.0 / 4.1
IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_00 = 2; // REF_CLK_32K, pg 469
Last edited:
PaulStoffregen
Well-known member
One more detail for the sake of completeness, which would only apply if making a custom PCB using the T4 bootloader chip, are the special CCM_CLK1_P and CCM_CLK1_N pads. These aren't physically connected on any Teensy, but if you create your own PCB of course you can route them. I believe these pins may be LVDS signals meant for high speed.... but you should check NXP's datasheet. I have never personally used these pins.
i have question about teensy 4.1
