Here are some library .cpp files that have conditional for MK20DX256 but not yet for MK66FX1M0 (nor K64)
Code:TFT_ILI9163C.cpp
#elif defined(__MK20DX128__) || defined(__MK20DX256__ || defined(__MK6[B]4[/B]FX512__ || defined(__MK6[B]6[/B]FX1M0__)//(arm) Teensy 3.0, 3.1, 3.2, 3.[B]4[/B], 3.[B]6[/B]
if ((_mosi == 11 || _mosi == 7) && (_sclk == 13 || _sclk == 14)) {
SPI.setMOSI(_mosi);
// ...
@Paul, for example FastCRC: Do you think it is better to use KINETISK or to add __MK64FX512__ and __MK66FX1M0__ ?
4. Use the additional memory to finish my 128x128 OLED graphics driver (this keeps a framebuffer in memory, sent via DMA SPI, and can apply any screen rotation with decent anti-aliasing rather than being limited to 0/90/180/270, great for use with the Prop shield)
Here are some library .cpp files that have conditional for MK20DX256 but not yet for MK66FX1M0 (nor K64)
#if defined(__arm__) && defined(CORE_TEENSY)
#elif defined(__MK20DX128__) || defined(__MK20DX256__ || defined(__MK64FX512__ || defined(__MK66FX1M0__)//(arm) Teensy 3.0, 3.1, 3.2, 3.4, 3.6
2.2.5 Security and Integrity modules The following security and integrity modules are available on this device:
Table 2-6. Security and integrity modules
Cryptographic acceleration unit (CAU) Supports DES, 3DES, AES, MD5, SHA-1, and SHA-256 algorithms via simple C calls to optimized security functions provided by Freescale.
Random number generator (RNG) Supports the key generation algorithm defined in the Digital Signature Standard.
Cyclic Redundancy Check (CRC) Hardware CRC generator circuit using 16/32-bit shift register. Error detection for all single, double, odd, and most multi-bit errors, programmable initial seed value, and optional feature to transpose input data and CRC result via transpose register.
Indeed you did:
@Paul, for example FastCRC: Do you think it is better to use KINETISK or to add __MK64FX512__ and __MK66FX1M0__ ?
Paul: Do you have a list of things showing what has been ported/tested/working?
Did I read "onboard crypto" ? That sounds amazing.
Eventually I want to expand the HAS_KINETISK_XYZ defines.
Either is fine.
The new USB controller and ethernet will also consume my time before I get to play with the CAU.
Outside edge pads (counterclockwise)
------------------------------------
Pin ADC Ser PWM SPI I2C CAN Touch I2S Eth Native
--- --- --- --- --- --- --- ----- --- --- ------
GND
0 RX1 MOSI1 TOUCH B16
1 TX1 MISO1 TOUCH B17
2 PWM D0
3 PWM SCL2 TX0 txd0 RXD1 A12
4 PWM SDA2 RX0 lrclk RXD0 A13
5 tx1 PWM D7
6 PWM CS1 D4
7 RX3 PWM mosi0 scl0 D2
8 TX3 PWM miso0 sda0 D3
9 RX2 PWM CS0 BCLK C3
10 TX2 PWM CS0 C4
11 MOSI0 MCLK C6
12 MISO0 C7
3.3V
24 CLK E26
25 bclk RXER A5
26 tx1 txd1 RXDV A14
27 rx1 rxd0 TXEN A15
28 rxd1 TXD0 A16
29 PWM tx0 TOUCH bclk B18
30 PWM rx0 TOUCH lrclk B19
31 A12 RX4 B10
32 A13 TX4 SCK1 B11
33 A14 TX5 scl0 TX1 E24
34 A15 RX5 sda0 RX1 E25
35 A16 PWM mclk C8
36 A17 PWM C9
37 A18 PWM SCL1 C10
38 A19 PWM SDA1 rxd1 C11
39 A20 mclk TXD1 A17
DAC0 A21
DAC1 A22
GND
13 SCK0 RXD0 C5
14 A0 PWM sck0 D1
15 A1 CS0 TOUCH txd1 C0
16 A2 scl0 TOUCH MDIO B0
17 A3 sda0 TOUCH MDC B1
18 A4 SDA0 TOUCH TIMER B3
19 A5 SCL0 TOUCH TIMER B2
20 A6 PWM CS0 D5
21 A7 rx1 PWM CS0 D6
22 A8 PWM TOUCH TXD0 C1
23 A9 PWM TOUCH LRCLK C2
3.3V
AGND
VIN
Interior pads (same location as Teensy LC & 3.2)
-------------
A10
A11
AREF
VUSB
Interior pads (located between pin 27 & 38/A19)
-------------
Reset
Program
GND
3.3V
Vbat
Interior pads (meant for 5 pin header)
-------------
VUSBHOST
Host D-
Host D+
GND
GND
Host Power Enable = PTE6
On-board SD card (decicated 4-bit SDIO)
----------------
DAT2 (PTE5)
DAT3 (PTE4)
CMD (PTE3)
3.3V
CLK (PTE2)
GND
DAT0 (PTE1)
DAT1 (PTE0)
TBD: extra pads if they fit on bottom side
------------------------------------------
Pin ADC Ser PWM SPI I2C CAN Touch I2S Eth Native
--- --- --- --- --- --- --- ----- --- --- ------
GND
DBGEN
SWCLK
SWDAT
54 D15
55 D11
56 SDA3 txd0 E10
57 SCL3 lrclk E11
40 A28
41 A29
42 A26
51 D14
52 D13
53 D12
43 CS2 B20
44 MOSI2 B22
45 MISO2 B23
46 SCK2 B21
GND
3.3V
47 RX6 scl0 D8
48 TX6 sca0 D9
49 A23 TIMER B4
50 A24 TIMER B5
Here's the pinout info.
No Vbat, Reset, Program Pins?
Are you going to support faster ("overclock") F_BUS ?