OpAmp and Teensy 4.1

[jonweisw2]

All-
I am using Teensy 4.1's for my static Boeing 727 simulator which uses OEM parts and have run into an issue using opamps with the Teensy.

I have designed a circuit to use the 3.3 PWM output of a Teensy 4.1 channel to modulate a -10 to +10vdc signal using an opamp. I have attached the schematic for this circuit. Using a Siglent benchtop power supply, this circuit performs flawlessly; the output is linear and it is able to cover the -10 to +10vdc rails that are necessary for this application (see red line in graph).

When I use the teensy to drive the Opamp, however, the response is very erratic in the midrange. Today I mapped out this response in 0.1vdc increments from 0 to 3.3vdc (blue line) using the siglent as well a Teensy 4.1 set to 8 bit resolution (yellow line) as well as 12 bit resolution (green line). This occurs with both the Lm358 opamp as well as the Op2134. See attached graph to observe the distortion. I am not able to obtain -1.7v at all and the rest of the mid range and the big dip at upper range are not anomalies that I can code for. Does anyone have any suggestions?

Many thanks!
Jon Weiswasser

 

[kd5rxt-mark]

@jonweisw2: The mid-range anomaly may be an interaction with the internal resistors on the GPIO pin (as discusses in <this> thread). This can be avoided by calling pinMode(<pin>, INPUT_DISABLE); in your setup() function. Sorry, I don't have any concrete suggestions for the upper range behavior . . . maybe put a small cap either on the IN to the initial opamp to filter/smooth the input, or on the output of the final opamp to filter/smooth the output ??

Mark J Culross
KD5RXT

 

[jonweisw2]

@jonweisw2: The mid-range anomaly may be an interaction with the internal resistors on the GPIO pin (as discusses in <this> thread). This can be avoided by calling pinMode(<pin>, INPUT_DISABLE); in your setup() function. Sorry, I don't have any concrete suggestions for the upper range behavior . . . maybe put a small cap either on the IN to the initial opamp to filter/smooth the input, or on the output of the final opamp to filter/smooth the output ??

Mark J Culross
KD5RXT

Mark -
Thank you. In this application the teensy pin is set to output as I am using the teensy to modulate a -10/+10vdc signal. Wouldn’t setting it to input_disable obviate that? Also, there are 1uF capacitors at both power supplies into the circuit as well as in the voltage divider which generates the reference voltage for the first stage of the opamp (0.1uF).
Jon

 

[kd5rxt-mark]

Doh, you're right !! Obviously, its been way too long since my cup of coffee this morning !!

Sorry for the unrelated/non-applicable recommendation !!

Mark J Culross
KD5RXT

 

[Pio]

PWM output is lacking a lowpass filter to create a DC voltage. Right now the circuit tries to convert a pulsed pwm signal from 0-3.3V range to -10 to +10V. What is measured is a chopped high frequency square wave using, presumably a dc voltage meter.
Texas Instruments has an app note about designing such circuits:

https://www.ti.com/lit/pdf/sbaa603

Still needs a properly designed low pass filter. Either before the scaling stage or in it (feedback capacitor) or even better using both.

 

[jonweisw2]

@Pio -
Thanks for the attention to this. Do you have any suggestions as to how to do that? Read that TI note and very useful. So - and correct me if I’m wrong - I should put a capacitor across the second stage feedback resistor of value 1/(2*Pi*Rf*kHz) which equals in this case 180pF (1/(2*Pi*24.3K*36.6kHz))? Am I also correct that you would recommend doing the same across the first stage feedback resistor as well?
Jon

 

[MarkT]

Just a capacitor across C5 is necessary - that makes that opamp an integrator(*), and the integral of a digital signal is continuous.

Opamps don't respond to discrete input steps nicely, they expect voltages to be a continuous function of time. You can make the second stage an integrator as well to further filter out the digital PWM frequency and its harmonics, but its not essential to circuit function as it is for the first stage. A more common circuit topology is an RC-filter before the opamp input.

Note some opamps can even be destroyed by directly applying digital signals as they have input protection diodes between the inputs with limited current handling. In general opamps are operated with the two inputs at the same voltage.

(*) strictly speaking a bandwidth-limited integrator - a true integrator has only a capacitor for feedback, but that wouldn't have a defined output DC offset without extra reset-circuity.

 

[Pio]

@jonweisw2
I'd go with the TI proposed circuit. One advantage is it has a higher input impedance as the 2 inverting stages from the schematic you posted. This gives more flexibility when adding a filter in front of the circuit.
As an example, i've played in LTSpice a bit and here is the result, also using a dual opamp:

I haven't simulated the PWM output of the Teensy, only a ramp voltage. R10+C2 is the input lowpass filter for the PWM output. According to this <page>, the PWM frequency for the T4.1 is either about 4.5kHz or 3.56kHz.
The filters are set to 160Hz in this example, but these can be changed.
R8+R3 create the 2.0V bias voltage (Vdiv).

What's also might cause problems later on is the type of the load, what is connected to the output of the opamp?

 

[jonweisw2]

@MarkT and @Pio -

Thanks so much for you help with all this. Pio - your reference to that TI document was a lifesaver. I really like the circuit you've laid out and would go ahead and construct it if it werent for the fact that Im already way down the rabbit hole on the one I sent you - Im already on the fourth iteration of PCB's with it and it now has 6 channels on one board. The addition of the capacitor isnt a big deal since I can just bridge it across the appropriate resistor to salvage the PCB's I have already. I will keep this one handy if I reach the end of the rope on the current one for some reason and I really appreciate your help with this.

So today I was too impatient to wait for the 180pF capacitors to arrive so I took the lowest value capacitor I had lying around - 10nF- and went ahead and bridged the 23.9k resistor which is the feedback resistor of the first stage of the opamp (R5 - Mark - I think that is what you were referring to in your much appreciated note). Ive attached the curve. The green and yellow were without the capacitor and the orange is with it. You can see that the response is now linear and nearly follows that of the benchtop supply. Big sigh of relief here. When the 180pF ones arrive tomorrow Ill run the same test to see if there are any differences.

As for what this is powering....This is being used to send signals to aircraft instruments that are being used in a static simulator. The instruments are DC powered but the motors are all supplied independently so that the load on the opamp is purely for signaling.

As always, thank you both so very much for your help.

Jon

 

[Pio]

The value of the capacitor sets the cutoff frequency of the filter. With R5 = 23.9k and C = 10n the cutoff is at about 666Hz, which i think is ok, way below the PWM frequency. 180pF will shift it up to ~37kHz, thus, assuming the f_pwm is 4.5kHz or less, the filter will be just rounding off the edges of the PWM signal (=ineffective).
The ideal cutoff frequency would be the lowest value which is causing a still acceptable or non noticeable lag in the instrument display.

Interesting project!

 

[Nominal Animal]

I like to use I²C or SPI digital-to-analog converters myself. For example, MCP4725 is a single 12-bit I²C ratiometric DAC (output depending on the supply voltage, no separate reference voltage) in SOT23-6, small but hand-solderable, with one I²C address selection bit/pin. There are four variants, MCP4725A?T-E/CH, where ? is 0, 1, 2, or 3, that only differ by the I²C address. Thus, if you get two of each variant, a single I²C bus can support eight different DAC outputs. To update the DAC state, four bytes are sent, so a single I²C bus at 400 kHz is limited to 12500 updates per second; or about 1560 updates per second for eight different DACs. They can drive a 5kΩ or higher impedance load directly. Mouser sells these for about 1€ apiece in singles (A0, A1, A2, A3). In addition to I²C pull-up resistors, these only really need some supply bypass capacitors (0.1µF=100nF as close to the DAC as possible, between VDD and VSS pins, and 10µF in common to all DACs, to provide a "local reservoir" when the DACs change state).

There are DACs like AD5722 that can output -10V to +10V directly (to a load of 2kΩ or higher), but they tend to be quite a bit more expensive, as they basically include the opamps needed. It uses a SPI-like interface, but without a select line, so if one needed more than two DAC outputs (AD5722 has two independent outputs), one would need to use a tristate buffer. Mouser sells AD5722 for about 10€ to 15€ apiece, each having two independently-controlled outputs at 12-bit precision.