#include <MK20D7.h>
#include "kinetis.h"
#define SET(x,b) x|=(1UL<<b)
#define CLR(x,b) x=x&(~(1UL<<b))
#define CHK(x,b) (x&(1UL<<b))
#define TOG(x,b) x^=(1UL<<b)
uint16_t ana_ctrl;
uint8_t address = 0x0A;
uint8_t A = 0, A1 = 0x14 ;
#define SGTL5000_I2C_ADDR_CS_LOW 0x0A // CTRL_ADR0_CS pin low (normal configuration)
#define SGTL5000_I2C_ADDR_CS_HIGH 0x2A // CTRL_ADR0_CS pin high
void I2C_Write(int x) ;
void I2C_Read( int y);
volatile uint32_t msTicks; /* counts 1ms timeTicks */
/*----------------------------------------------------------------------------
SysTick_Handler
----------------------------------------------------------------------------*/
void SysTick_Handler(void) {
msTicks++; //increment counter necessary in Delay()//
}
/*------------------------------------------------------------------------------
delays number of tick Systicks (happens every 1 ms)
------------------------------------------------------------------------------*/
__INLINE static void Delay (uint32_t dlyTicks) {
uint32_t curTicks;
curTicks = msTicks;
while ((msTicks - curTicks) < dlyTicks);
}
void delay_us(int xyz)
{
uint16_t MN = 18 * xyz;
for (int mn = 0; mn <= MN; mn++)
{
}
}
long a = 1 , b = 0, c = 0, d = 0;
/*---------------------------LED Configuration------------------------------------*/
void Led_Config(void)
{
SIM -> SCGC5 |= (1UL << 11);
PORTC -> PCR[5] |= (1UL << 8);
PORTC -> PCR[5] |= (1UL << 6);
PTC -> PDDR |= (1UL << 5);
PTC -> PDOR |= 0;
}
void Led_On()
{
PTC -> PDOR |= (1UL << 5);
}
void Led_Off()
{
PTC -> PDOR = 0;
}
/*----------------------------I2C COnfiguration---------------------------------------*/
void I2C_config(void)
{
SIM -> SCGC4 |= (1UL << 6);
SIM -> SCGC5 |= (1UL << 10);
PORTB -> PCR[2] |= (1UL << 9); //SCL Initalize//
PORTB -> PCR[3] |= (1UL << 9); //SDA Initalize//
SET(PORTB -> PCR[2], 1);
SET(PORTB->PCR[3], 1); //Pullup enable//
SET(PORTB -> PCR[2], 0); //Pull select//
SET(PORTB->PCR[3], 0);
SET(PORTB -> PCR[2], 2); //Slew Rate Enable//
SET(PORTB->PCR[3], 2);
SET(PORTB -> PCR[2], 6); //Drive Strength Enable//
SET(PORTB->PCR[3], 6);
SET(PORTB -> PCR[2], 5); //Open Drain Enable//
SET(PORTB->PCR[3], 5);
SET(PORTB->PCR[3], 16); //IRQC at rising edge in SDA//
SET(PORTB->PCR[3], 19);
SET(PORTB->PCR[3], 24);
I2C0_F = 0X13;
}
/*----------------------I2S config-------------------------------*/
void I2S_Config()
{
SET(SIM_SCGC6, 15);
SET(SIM_SCGC5, 11);
SET(PORTC->PCR[6], 10);
SET(PORTC->PCR[6], 9);
SET(PORTC->PCR[6], 1);
SET(PORTC->PCR[6], 5);
SET(PORTC->PCR[6], 6);
I2S0_MCR |= 0x40000000;
I2S0_MDR |= 0x0006327C;
}
/*------------------------------------------Start and Stop Signals-------------------------------------------*/
void StartConfig()
{
SET(PTB -> PDOR, 2);//SCL HIGH//
SET(PTB -> PDOR, 3); //SDA HIGH//
delay_us(100);
CLR(PTB -> PDOR , 3); //SDA LOW//
}
void StopConfig()
{
CLR(PTB -> PDOR, 3); //SDA LOW//
delay_us(100);
SET(PTB -> PDOR, 3); //SDA HIGH//
CLR(PTB -> PDOR, 2);//SCL LOW//
}
void ack()
{
while (CHK(PTB -> PDOR, 3));
}
void I2C_Write(x)
{
I2C0_D = x;
ack();
Delay(10);
while (!CHK(I2C0_S, 1));
while ((CHK(I2C0_S, 0)));
SET(I2C0_S, 1);
}
void I2C_Read(y)
{
y = I2C0_D;
}
void Master_Write( uint8_t data)
{
SET(I2C0_S, 1);
SET(I2C0_S, 4);
I2C0_C1 = 0 ;
SET(I2C0_C1, 6);
SET(I2C0_C1, 7);
SET(I2C0_C1, 4);
SET(I2C0_C1, 5);
StartConfig();
if (CHK(I2C0_C1, 5))
{
I2C0_C1 = 0xF4 ;
Delay(5);
if (CHK(I2C0_S, 5))
{
I2C_Write(A1);
I2C_Write(CHIP_ANA_POWER >> 8);
I2C_Write(CHIP_ANA_POWER);
}
else
{
}
}
}
void write(unsigned int reg, unsigned int val)
{
StartConfig();
SET(I2C0_C1, 5);
Master_Write(reg >> 8);
Master_Write(reg);
Master_Write(val >> 8);
Master_Write(val);
CLR(I2C0_C1, 5);
StopConfig();
Led_On();
Delay(200);
Led_Off();
Delay(100);
}
/*----------------------------------------------Main Program Start-----------------------------------------*/
int main(void)
{
uint16_t ana_ctrl;
SystemCoreClockUpdate(); /* Get Core Clock Frequency */
SysTick_Config(SystemCoreClock / 1000); /* Generate interrupt each 1 ms */
Delay(500);
Led_Config();
I2C_config();
I2S_Config();
Master_Write(0x20);
while (1)
{
}
}
void SGTL_enable()
{
Delay(5);
write(CHIP_ANA_POWER, 0x4060); // VDDD is externally driven with 1.8V
write(CHIP_LINREG_CTRL, 0x006C); // VDDA & VDDIO both over 3.1V
write(CHIP_REF_CTRL, 0x01F2); // VAG=1.575, normal ramp, +12.5% bias current
write(CHIP_LINE_OUT_CTRL, 0x0F22); // LO_VAGCNTRL=1.65V, OUT_CURRENT=0.54mA
write(CHIP_SHORT_CTRL, 0x4446); // allow up to 125mA
write(CHIP_ANA_CTRL, 0x0137); // enable zero cross detectors
write(CHIP_ANA_POWER, 0x40BF); // power up: lineout, hp, adc, dac
write(CHIP_DIG_POWER, 0x0073); // power up all digital stuff
Delay(400);
write(CHIP_LINE_OUT_VOL, 0x1D1D); // default approx 1.3 volts peak-to-peak
write(CHIP_CLK_CTRL, 0x0004); // 44.1 kHz, 256*Fs
write(CHIP_I2S_CTRL, 0x0130); // SCLK=32*Fs, 16bit, I2S format
// default signal routing is ok?
write(CHIP_SSS_CTRL, 0x0000); // ADC->I2S, I2S->DAC
write(CHIP_ADCDAC_CTRL, 0x0000); // disable dac mute
write(CHIP_DAC_VOL, 0x3C3C); // digital gain, 0dB
write(CHIP_ANA_HP_CTRL, 0x0000); // set volume (lowest level)
write(CHIP_ANA_CTRL, 0x0122); // enable zero cross detectors
}
