Teensy 4.0 was not designed to be powered this way. It can be made to work, but you should be aware of the startup sequencing requirements (which currently are not yet well documented).
The main issue is Teensy 4.x needs power on its SNVS input before or simultaneously with the other power inputs, except USBx_VBUS. If you apply power to the NVCC_xxx pins or VDD_HIGH_IN or VCC_ADC before SNVS, or if you externally drive any I/O pins while SNVS is off which bleeds power through the ESD protection diodes to the chip's internal power rails, the chip may fail to start up because SNVS wasn't powered first or at least simultaneously.
To be more specific, this means applying power to the VDD_SNVS_IN pin and allowing enough time for the capacitor connected to VDD_SNVS_CAP to charge up. If power gets applied to the other pins before that SNVS capacitor reaches about 1.0 volt, the chip may not start up.
Normally when you apply power to VUSB or VIN, the 3.3V regulator is kept off by a 100K resistor connected to its enable pin. The incoming power does go to USB1_VBUS and USB2_VBUS. The USB VBUS regulator is an exception to the "SNVS first" rule, as it's fully independent of the rest of the chip's startup sequence.
With USB power applied to those 2 pins, the capacitors on VDD_USB_CAP start to charge, reaching about 2.5 volts.
VDD_SNVS_IN starts to get power as VDD_USB_CAP charges up, because it's connected by a BAT54C diode. Keep in mind VDD_SNVS_IN will be "behind" VDD_USB_CAP due to the forward voltage drop of the diode. The diode's forward voltage drop causing effectively a delay is an important point to keep in mind if you power Teensy 4.x in alternate ways where the power rises slowly.
In the normal startup sequence, once VDD_SNVS_CAP is charged, the chip's internal power management and security hardware boots up. Within several milliseconds, it drives PMIC_ON_REQ high. Keep in mind logic high on that pin is about 1.1V at this early stage. The 3.3V regulator we use on Teensy 4.x is rated to work with 1V enable. Regulators needing a higher logic voltage won't work.
As the 3.3V power come up, the DCDC buck converter remains off due to a 100K resistor connected to DCDC_PSWITCH. The VDD_HIGH_CAP and NVCC_PLL capacitors start to charge up.
The MKL02 chip boots up and configures its brown-out detection for approx 2.9V. It then waits several milliseconds for the 3.3V power to be stable and then drives DCDC_PSWITCH high, which causes the buck converter to start creating the 1.15V power the main CPU needs to start. NXP's documentation gives a wrong impression that DCDC_PSWITCH may be level sensitive. It is not. A rising edge after 3.3V is stable is required to make the DCDC buck convert start.
The MKL02 also drives POR_B high after another short delay, which lets the main IMXRT chip boot.
If you try to power Teensy 4.0 with only 3.3V power, you'll be skipping the first half of this power up sequence. Remember, the voltage at VDD_SNVS_IN is slightly "behind" due to the BAT54C forward voltage drop. If your 3.3V power rises very quickly to at least 1.5V, you may be able to get power to VDD_SNVS_IN and VDD_SNVS_CAP fast enough for the chip to start up. But if your 3.3V power is created by a power supply with "soft start" or a linear power supply with large capacitors, it will probably rise too slowly.
There are a couple possible workarounds. As you can see on the Teensy 4.x schematic, the cathode of all those diodes which connect to VDD_SNVS_IN come to a test point. If you short that test point to 3.3V power, then VDD_SNVS_IN will no longer be "behind" or delayed from the 3.3V rise.
The other alternative is to arrange for VBAT to have power before you apply the main 3.3V power. Maybe a resistor and zener diode or LED to create a low power 2-3V input to VBAT would be used from your unregulated power. Only a fraction of a milliamp is needed.