Reading a 1Mhz -15V to Gnd clock

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I'm very new to teensy but thought it could help me with a midi retrofit project.

I chose the Teensy++ 2.0 due to the 5V tolerance & the number of digital I/O's. I'm working with a Keyboard/Organ that I'm hoping to interface the teensy into by means of reading its (the keyboard's) clock signal. *This is so i can spit out logic signals back to the keyboard.

The clock signal is 1Mhz, that swings from -15V (Low) to 0V (High), the High & Low cycles each 0.5us. *see attachment

I figure i will just need to do a simple resistor voltage divider to get that -15V (low) down to -5V, but will I also then have to invert the voltage to +5v with an opamp, or can the Teensy++ 2.0 handle negative voltages on it's I/O pins?

Just so I know I'm not barking up the wrong tree, this board should be able to track/follow a 1mhz external clock?

Thank you


  • clock.jpg
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or can the Teensy++ 2.0 handle negative voltages on it's I/O pins?

No. The pins only work with 0 to 5V signals. Driving the pin below GND can damage the hardware.

Just so I know I'm not barking up the wrong tree, this board should be able to track/follow a 1mhz external clock?

The CPU on Teensy++ 2.0 runs at 16 MHz. So if you're going to try to actually do something every 1 microsecond, unless "track/follow" is extremely simple, the CPU probably won't be fast enough. You'd probably do much better to use one of the much faster Teensy 3.x boards. Teensy 3.5 is 5V tolerant and has a similar number of pins, and runs much faster so you'd have a much better chance of doing something useful within 1 us.

You mentioned only a clock. If there's also a data signal, you could use something like the SPI port in slave mode. Then you'd get a byte every 8 us, with the data from 8 clock cycles. That's still pretty fast, but probably more feasible than running code for each clock cycle.

If there isn't any data, only this clock, and "track/follow" means something like measuring the frequency, maybe the FreqCount library could help.
Hey Paul,

Thanks for the reply, shouldn’t be too hard i guess to get it into 5V logic.

Regarding the timing, the 1uSec master clock i believe is divided down inside the cmos chips after studying related service manuals closer, i think the note timing is more like every 3uSec (per note), and its sent as a 4-bit parallel data code.

I’ve got a 20mhz scope on the way so i’ll be able to tell in more detail.

But the way i believe it acts is that for 14-note polyphony, a sync signal is sent out every 42uSec, and within that period, every 3uSec a 4-bit parallel code is sent for each of the 14 voice/note channels that corresponds to note and octave data.

Given those conditions, should the teensy++ be able to handle the task Vs every 1uSec?

Actually i got that wrong, i think it does need to send out a 4-bit parallel code every 1us. Its just does so using 3 nibbles over a 3uSec period (touch data -> octave data -> note data (c# to c).

Maybe i’ll have to create an array to speeed things up.

That being said, no one plays keyboard at that rate, its more for communication timing when a note is detected.
That's a very unusual and very fast interface for a musical instrument.

If it really is sending 4 bits (so 5 signals, CLK and D0 to D3...) every microsecond, you're probably going to need a much faster board. Probably best to plan on using Teensy 3.6. Of course, design your circuitry to convert to 3.3V signals, since Teensy 3.6 is not 5V tolerant.
I think the engineers at Yamaha were overachievers ;)

I’m wondering though, if i setup a 8-bit array already prefilled with the code corresponding to the key (c# to c) and octave data, shouldn’t a 16mhz board be fast enough? How many cycles does it take to read an array value and apply, say, a bitwise AND operation to write those values to four digital i/o’s?

Read 8-bit array value -> bitwise AND x4 every 1 uSec.

Sorry if this is a braindead question, I’m just trying to understand how certain things apply to clock cycles. Like the teensy++ 2.0 can handle 16 instructions every 1uSec, are bitwise operations performed in 1 cycle? How long does it take to read a const array value?

Thanks, ive never coded using dev boards, only computers that are +200x faster so i’m in new territory ;)
shouldn’t a 16mhz board be fast enough?

No, probably not fast enough.

How many cycles does it take to read an array value and apply, say, a bitwise AND operation to write those values to four digital i/o’s?

The only way to really know the answer is to compile the code, then look at the assembly listing, and check how many cycles each instruction really takes.

In Arduino, click File > Preferences to turn on verbose output while compiling. Then look at the messages after compiling to figure out the temporary directory where Arduino compiled your code. Look in that location for the .LST file.

Near the end of the datasheet is a list of all AVR instructions and how many cycles each takes.

Thanks, ive never coded using dev boards, only computers that are +200x faster so i’m in new territory ;)

I can tell you from many years of experience, doing this with a 16 MHz 8 bit AVR chip will be extremely difficult. I'm not saying "impossible", though it might be, depending on many small details. My general advice, first and foremost is to really confirm the actual requirements. But if it is truly is as you've said, I would advise using a much faster microcontroller.

If you like want to follow that advice, that's your choice. But don't expect I or anyone else here can guide you step-by-step on the low-level to achieve this highly improbably speed on such an old and slow microcontroller. I can point you to features like the LST file and AVR instruction documentation. The rest is up to you.
Is the only difference between 3.5 & 3.6 the 5v tolerant pins on the former?

Its a little cheaper here in Australia, and its easy math going from -15v to 5v electronically.
No, the 3.6 has a maximum clock rate of 180MHz while the 3.5 has 120MHz. The 3.6 has 1024kB of program flash, the T3.5 only 512kB.
Thanks. I’ve gone ahead and ordered a 3.6 board. Appreciate your patience with my questions.

I think even if it was possible, having room to expand is wise. Not only that but now i can likely do two channels and control each sound chip seperatley over two midi channels.
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One last question or two;

I’ve built inverting opamp channels with gain reduction to turn the (-15v to 0v) logic into (3.3v to 0v).

When looking at the scope, it looks good but it seems to go a “hair” into negative voltage territory when initially going LOW (around -250mv). Can the 3.6 board handle absolutley no negative voltage?

If so i imagine i’d use a 1n914 in series to block negative voltages, but that’ll come with a 0.7v voltage drop (less with schotky). What is the minimum voltage for the teensy digital inputs to read HIGH?


*realise i could change the gain to compensate for the forward voltage drop, but ive already soldered all the resistors into a cramped project board, don’t want to have to remove resistors to change gain if possible.
ah, poor opamp circuit design on my part, needed to add a small 680ohm output resistor (in addition to input & feedback resistor). The opamp was oscillating, causing spikes into negative range, 220ohm improved it, slighly larger eliminated it going into negative.
Can the 3.6 board handle absolutley no negative voltage

It can handle up to -300 mV.

Any farther than -0.3V risks damage. That includes behavior during startup and shutdown, so it's wise to check what your opamp actually does when power comes up and shuts down. Some opamps are notorious for briefly driving a full scale positive or negative output before the feedback loop takes control.

If you're using more than 1 signal, even if the opamp has enough bandwidth, you might also verify how well the propagation delay matches between signals. 1 MHz is a pretty fast signal. If you use a very fast opamp, like 100 MHz gain-bandwidth product, that's still only an open loop gain of 40 dB at 1 MHz. If you more than 1, how well they match each other's performance might matter, might affect whether you receive other signals with their timing relationship to the clock properly translated to 3V logic.
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Thanks Paul, i will look into all these points you highlight, definetley some things I hadn’t considered.

I’m attempting to do 12 channels using 3 quad opamps using tl074’s (best available without ordering), they are 13v/us. One thing i noticed is my inverting gain formula doesn’t match expected results, where i was expecting +3.3v, i’m get more like 2.3v. Perhaps this relates to a tl074 being underpowered for the application? I’ll have to see what is available in dip-14 that is faster to test.

I’ll include a 3.3V zener to gnd at the input pins to the teensy, that’ll protect overvoltage, I’m going to see what results i get just tying the negative rail of the opamps to gnd, perhaps that will elimate the need to diodes for blocking negative voltages.

Thanks again
I’ve figured it out. I simply need an RC lowpass filter on the oupuf of the opamps going to the teensy pins. That gets rid of negative spikes. I guess a -3db filter around 1mhz should suffice.

The gain issue was another flub, i had the wrong resistor in 1 of the feedback paths. I now get almost within .03v of a full 3.3v logic signal.

I’ve got some 3.3v zeners enroute, i’m thinking the rc filter + zener to gnd at the input pins should have me covered protection wise.

Should almost be ready to start coding ;)

*on another note the tl074’s from ST, which i have, seem to be rated higher than the TI parts, around 16v/us. They seems fast enough to handle a 1mhz signal reduction, maybe when i’m amplifying for +3.3v to -15v for the output signal there may be issues with timing.
I’ve been breadboarding some 3.3v zener diodes after the RC filter ive created (on the opamp outputs), since the gain on the opamps brought the signal to around 0v-3.28v (ish), i didn’t expect a 3.3v zener to cause any voltage drop, but it reduces the voltage about 0.5v.

I’m using 220ohm resistor + 680pf cap for the rc filter, my peak voltage dropped from 3.28v to around 2.75v.

I’m guessing the zener is creating some sort of voltage divider action, and maybe 2.75v is high enough for the teensy 3.6 to register HIGH. Is this something i should just live with, accept a 2.75v voltage for HIGH logic?
maybe 2.75v is high enough for the teensy 3.6 to register HIGH. Is this something i should just live with, accept a 2.75v voltage for HIGH logic?

According to the NXP datasheet for the K66, at p.7:

it should, because HIGH is at 0.7xVdd and Vdd is 3.3V (so Vhigh = 2.3V). That said, it would be better to have a larger margin, IMHO (but can't help you about that... maybe a different Zener model with lower forward R?)
I’d just read its almost common practice to add 3.3v zeners on the inputs for protecting pins, anode to ground. If i add the zener before the rc filter, no voltage drop but i see negative voltage spikes, almost like its negating the rc filter function.
I wonder if a 6N137 optcoupler would work as your level shifter. It may work at 3.6V for Vcc, although the datasheet says 4.5V minimum. It would provide ground loop protection for your keyboard.
That opto is too slow. I was thinking of a 6N137M. You may need to fiddle with the resistor values to get the desired rise/fall times. Also, it is uncertain as to how much delay this circuit produces to make this not work for you.

6N137 interface.jpg
Edit: This circuit will invert your input signal. Will it matter?
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Inverting shouldn’t be a problem, just a change of logic in the teensy code.

This part looks similiar but is designed to work at 3.3v;

Just another quick question, i’ve scanned the datasheet for the microcontroller in the 3.6 board. I can see a max current per pin of 25ma, but no minimum listed. I see you’ve chosen a 330ohm resistor in your example which equals 10ma. Has anyone tested the lower limits? I’m just wondering what kind of wiggle room i have.

Thanks again for the schematic and tips.
I didn't do any testing, but drew the diagram to provide a proof of concept. Your selection of a high speed opto is better since it is designed to work with 3.3V.
The 330 ohm was an arbitrary value I picked. The datasheet you just gave uses 350 ohms for the pull-up resistor of the opto's output (e.g. Fig 11). The input to the micro will not draw much current due to the high input resistance. It's the output pin that you are probably referring to for a max of 25ma.

What wiggle room are you looking for?
I’m wondering if i’ve made it overly complicated. The original circuit uses a 4050BP non-inverting hex buffer, wired in an oddish way; its supply voltage is connected to gnd and the Vss is tied to -15v.

This has 6 buffers onboard;

It (the 4050) is driven by a cmos output between -15v to 0v, though.

In my experience things aren’t usually easy, but i wonder if i wired up another 4050 with Supply voltage to gnd and Vss tied to 3.3v if that would be all that is necessary (driven from the same -15v to 0v cmos output). I just don’t know how they will behave with different polarities).

These opamps ive build seem overly complicated with rc filters and voltage protection, and they behave poorly with the inputs floating (annoying while prototyping).
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