SPDIF preamble inverted for output_spdif3?

[PaulS]

Probably a question for @jmarsh...
While looking into the thread "SPDIF output: adding "copy permitted" in the channel status", I noticed on the logic analyzer that the preamble of output_spdif3 is inverted with respect to the preambles of output_spdif & output_spdif2.

Below are screendumps of the logic analyzer.
First "Preamble B" of output_spdif:

And output_spdif3:

In output_spdif.cpp and output_spdif2.cpp the preambles are defined like so:

#define PREAMBLE_B  (0xE8) //11101000
#define PREAMBLE_M  (0xE2) //11100010
#define PREAMBLE_W  (0xE4) //11100100

This matches the logic analyzer reading for output_spdif.

However, I could not find where the (inverted) preambles are defined for output_spdif3.
Do you have any idea where these preambles are defined?

Thanks,
Paul

 

[jmarsh]

Whether the preamble is inverted or not depends on the parity bit (P) of the previous subframe.
The I2S-based SPDIF output modules are coded in a way so that P is always "low" 0 (one of the unused aux bits is used like a parity bit instead, to ensure even parity) so the preambles are never required to be inverted.
output_spdif3 uses the SPDIF module that handles the parity and preamble inversion in hardware.

 

[PaulS]

Thanks, it's clear now on the output_spdif & output_spdif2 modules.
With respect to output_spdif3: I read through the complete "Chapter 40 Sony/Philips Digital Interface (SPDIF)" of the IMXRT1060 Processor Reference Manual but there is no mentioning about preamble whatsoever?
Do you know in what document this is described?

Paul

 

[jmarsh]

It's a standard feature of IEC60958 which is what the hardware implements.