Two seperate SPI busses, with the Teensy behaving as slave on both of them.SPI protocol lacks multi-master arbitration or other sharing mechanisms. How do you imagine 2 masters could possibly work on any SPI bus?
Don't most processors have some form of interrupt scheduling / something to manage two interrupts happing at the same time or close proximity?this library setups only one LPSPI as slave. Even if you managed to setup 2 or more slave on LPSPI you'd need to be able to manage the 2 ports simuletaneously, and if interrupts are involved, good luck
void myFunc() {
noInterrupts();
digitalWrite(5, HIGH);
//while ( mySPI.active() ) {
if (mySPI.available()) {
mySPI.pushr(l<<1);
}
//}
digitalWrite(5, LOW);
interrupts();
}
it all depends on how long your interrupts are, and the speeds of the SPI obviously especially when pushing data. if the slave interrupt is not ready to receive because of another interrupt you may lose data. Your example shows a single data transfer, if your purpose is to test a single byte/word vs arrays of data and processing without including other running code while 2 SPI are transferring streams of data, then this could be fine, otherwise something might happen, data may corrupt, and then people might complain about libraries not working without considering this
Sorry, was unclear, I need the teensy to act as SPI slave to two different masters!
SLAVE_IER = 0x1; /* RX Interrupt */
#include <SPI.h>
uint8_t arr[8] = {1, 2, 3, 4, 32, 64, 128, 255};
void setup() {
// initialize the digital pin as an output.
pinMode(10, OUTPUT);
Serial.begin(9600);
while(!Serial);
SPI.begin();
digitalWrite(10, HIGH);
}
void loop() {
SPI.beginTransaction(SPISettings(200000, MSBFIRST, SPI_MODE0));
digitalWrite(10, LOW);
for(uint8_t i = 0; i < 8; i++){
//Serial.println(SPI.transfer(0x55));
//SPI.transfer(0x55);
SPI.transfer(arr[i]);
}
delayMicroseconds(1);
digitalWrite(10, HIGH);
SPI.endTransaction();
Serial.println("=============");
delay(100);
}
#include "SPISlave_T4.h"
SPISlave_T4<&SPI, SPI_8_BITS> mySPI;
byte returnVal = 0xEE;
void setup() {
//Serial.begin(115200);
//while (!Serial);
//Serial.println("Starting");
mySPI.onReceive(myFunc);
mySPI.begin();
//Serial.println("Begin");
//Serial.println("onReceive setup");
}
void loop() {
//Serial.print("millis: "); Serial.println(millis());
delay(1000);
}
void myFunc() {
Serial.println("START: ");
// uint8_t arr[] = { 3, 2, 8, 3, 10, 11, 33, 13, 14 };
//uint8_t arr[] = {0x03, 0x02, 0x05, 0x06};
uint8_t i = 0;
while ( mySPI.active() ) {
if (mySPI.available()) {
mySPI.pushr(2);
uint8_t receive = mySPI.popr();
Serial.println(receive, HEX);
//if ( i++ > sizeof(arr) ) i = 0;
// Serial.print("\t i = ");
// Serial.print(i);
//mySPI.pushr(receive);
//Serial.print("\tVALUE: ");
//Serial.print(mySPI.popr());
}
}
Serial.print("\tEND\n");
}
SPISlave_T4_FUNC SPISlave_T4_OPT::SPISlave_T4() {
if ( port == &SPI ) {
_LPSPI4 = this;
_portnum = 3;
CCM_CCGR1 |= (3UL << 6);
nvic_irq = 32 + _portnum;
_VectorsRam[16 + nvic_irq] = lpspi4_slave_isr;
/* Alternate pins not broken out on Teensy 4.0/4.1 for LPSPI4 */
SLAVE_PINS_ADDR;
spiAddr[0] = 0; /* PCS0_SELECT_INPUT */
spiAddr[1] = 0; /* SCK_SELECT_INPUT */
spiAddr[2] = 0; /* SDI_SELECT_INPUT */
spiAddr[3] = 0; /* SDO_SELECT_INPUT */
IOMUXC_SW_MUX_CTL_PAD_GPIO_B0_03 = 0x3; /* LPSPI4 SCK (CLK) */
IOMUXC_SW_MUX_CTL_PAD_GPIO_B0_01 = 0x3; /* LPSPI4 SDI (MISO) */
IOMUXC_SW_MUX_CTL_PAD_GPIO_B0_02 = 0x3; /* LPSPI4 SDO (MOSI) */
IOMUXC_SW_MUX_CTL_PAD_GPIO_B0_00 = 0x3; /* LPSPI4 PCS0 (CS) */
}
}
Hello, i'm trying using sp1.last update only supports SPI, not SPI1, so currently no support is implemented in last update
SPISlave_T4_FUNC SPISlave_T4_OPT::SPISlave_T4() {
if ( port == &SPI1 ) {
_LPSPI3 = this;
// 0=LPSPI1 1=LPSPI2 2=LPSPI3 3=LPSPI4
_portnum = 2;
//(pag 1079)
//
CCM_CCGR1 |= (3UL << (_portnum*2));
nvic_irq = 32 + _portnum;
_VectorsRam[16 + nvic_irq] = lpspi4_slave_isr;
SLAVE_PINS_ADDR;
/*
(pag 840)
LPSP1
PCS0_SELECT_INPUT
0 GPIO_SD_B0_01_ALT4 — Selecting Pad: GPIO_SD_B0_01 for Mode: ALT4
1 GPIO_EMC_30_ALT3 — Selecting Pad: GPIO_EMC_30 for Mode: ALT3
SCK_SELECT_INPUT
0 GPIO_EMC_27_ALT3 — Selecting Pad: GPIO_EMC_27 for Mode: ALT3
1 GPIO_SD_B0_00_ALT4 — Selecting Pad: GPIO_SD_B0_00 for Mode: ALT4
...
LPSP3
PCS0_SELECT_INPUT
0 GPIO_AD_B0_03_ALT7 — Selecting Pad: GPIO_AD_B0_03 for Mode: ALT7
1 GPIO_AD_B1_12_ALT2 — Selecting Pad: GPIO_AD_B1_12 for Mode: ALT2
SCK_SELECT_INPUT
0 GPIO_AD_B0_00_ALT7 — Selecting Pad: GPIO_AD_B0_00 for Mode: ALT7
1 GPIO_AD_B1_15_ALT2 — Selecting Pad: GPIO_AD_B1_15 for Mode: ALT2
SDI_SELECT_INPUT
0 GPIO_AD_B0_02_ALT7 — Selecting Pad: GPIO_AD_B0_02 for Mode: ALT7
1 GPIO_AD_B1_13_ALT2 — Selecting Pad: GPIO_AD_B1_13 for Mode: ALT2
SDO_SELECT_INPUT
0 GPIO_AD_B0_01_ALT7 — Selecting Pad: GPIO_AD_B0_01 for Mode: ALT7
1 GPIO_AD_B1_14_ALT2 — Selecting Pad: GPIO_AD_B1_14 for Mode: ALT2
*/
spiAddr[0] = 0; /* PCS0_SELECT_INPUT */
spiAddr[1] = 1; /* SCK_SELECT_INPUT */
spiAddr[2] = 0; /* SDI_SELECT_INPUT */
spiAddr[3] = 1; /* SDO_SELECT_INPUT */
IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_03 = 0x7; /*ALT7 LPSPI3 PCS0 (CS1) pin 0 */
IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_15 = 0x2; /*ALT2 LPSPI3 SCK (CLK1) pin 27 */
IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_02 = 0x7; /*ALT7 LPSPI3 SDI (MISO1) pin 1 */
IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_14 = 0x2; /*ALT2 LPSPI3 SDO (MOSI1) 26 */
}
}