Jp3141
Well-known member
Actually these lines:
#define startPITPeriod(n, period) {cli(); PIT_LDVAL
= F_BUS * float(period); PIT_TCTRL
= 3; NVIC_ENABLE_IRQ(IRQ_PIT_CH
); sei();}
#define startPITFreq(n, freq) {cli(); PIT_LDVAL
= F_BUS / (freq); PIT_TCTRL
= 3; NVIC_ENABLE_IRQ(IRQ_PIT_CH
); sei();}
should be:
#define startPITPeriod(n, period) {cli(); PIT_LDVAL
= F_BUS * float(period)-1; PIT_TCTRL
= 3; NVIC_ENABLE_IRQ(IRQ_PIT_CH
); sei();}
#define startPITFreq(n, freq) {cli(); PIT_LDVAL
= F_BUS / (freq)-1; PIT_TCTRL
= 3; NVIC_ENABLE_IRQ(IRQ_PIT_CH
); sei();}
The -1 is because the counter counts to 0 from the load value. This is only important it you have high frequency interrupts; you can prove it by setting a PIT at (say) 1 ms (==48000), and printing ( micros() % 1000) in it -- the result will creep up because you will be actually incrementing (delaying) by 48001 cycles instead of the expected 48000
#define startPITPeriod(n, period) {cli(); PIT_LDVAL
#define startPITFreq(n, freq) {cli(); PIT_LDVAL
should be:
#define startPITPeriod(n, period) {cli(); PIT_LDVAL
#define startPITFreq(n, freq) {cli(); PIT_LDVAL
The -1 is because the counter counts to 0 from the load value. This is only important it you have high frequency interrupts; you can prove it by setting a PIT at (say) 1 ms (==48000), and printing ( micros() % 1000) in it -- the result will creep up because you will be actually incrementing (delaying) by 48001 cycles instead of the expected 48000