Teensy 3.2 - SPI Clock over 30 MHz.

[AndiIsl]

Im running a Teensy 3.2 @144 with 72 MHz SPI with an ILI9341 and all works perfect.

my teensy runs more than 48 hours continuously without any problem.

 

[defragster]

Indeed - I just powered up a TOUCH test ILI9341 at 144 MHz on a T_3.1 and it seems to be working fine with the SPI clock change in setup().

<edit> : my lame touch sketch ILI9341 with SD flash dir doesn't work when sped up on the display SD

sumotoy is about to drop a big update on that 128x128 TFT - will test again with that.

 

[AndiIsl]

that is because sd cards supports not so a high SPI clock speed. You can see from a other post i had a problem with the NRF24L01 and solved it.

 

[WMXZ]

that is because sd cards supports not so a high SPI clock speed.

which may also depend on the model and connection quality. In my applications, I hardly can go over 16 MHz SPI clock speed for the 64MB uSD card, I remember once to have used 24MHz SPI clock speed for a 32MB SD card but cannot reproduce this anymore.

 

[AndiIsl]

Yes thats right.

 

[PaulStoffregen]

All SD cards are supposed to support up to 25 MHz clock speed, according to the SDIO spec. Newer cards are supposed to work up to 50 MHz. I believe you're supposed to read ID registers to tell if the card is that version or later, before increasing the clock higher than 25 MHz.

 

[defragster]

February 8, 2007 2.00 (1) Added method to change bus speed (Normal Speed up to 25MHz and High Speed up to 50 MHz)

I just find the link to the simplified spec - that excludes details.

Simplified_SDIO_Card_Spec.pdf

Implied - but I can't tell if the 50MHz and HiSpeed mode requires use of four bit IO? . . . must be tied together as 12.5MByte/sec can't be had on 1 bit IO? It seems like that was the case in the WiKi summary I found the other month.

I'm looking at FrankB's ParallelFlash code that does 4 bit IO using 6 PORT_D bits for FLASH, to update to twin FLASH chips and 8 bits BiParallel I/O - uses 8 bits in PORT_D and 3 from PORT_C.

12. High-Speed Mode High-Speed mode increases the bus clock rate to 50MHz and the SD bus throughput from 12.5MB/sec to 25MB/sec. For information on High-Speed mode for SD memory cards see Part 1 Physical Layer Specification Version 2.00, sections 4.3.10, 4.3.11 and 6.8. SDIO and combo cards may also support High-Speed mode.
12.1 SDIO High-Speed Mode
SDIO version 1.20 cards indicate their support for High-Speed mode with the SHS (Support High-Speed) bit in the CCCR (See section 6.9). Hosts switch between default and High-Speed mode with the EHS (Enable High-Speed) bit in the CCCR by CMD52. ...

https://en.wikipedia.org/wiki/Secure_Digital#SDIO

Electrical interface
... Thereafter, the host device may issue a command to switch to the four-bit SD bus interface, if the SD card supports it. ...
... After determining that the SD card supports it, the host device can also command the SD card to switch to a higher transfer speed ...