I am looking for a way to transfer I2S using interrupt instead of DMA.
This library was supporting it on the Teensy 3.
https://github.com/hughpyle/teensy-i2s
It does not work on the Teensy4.
I want to use I2S1(mapped to SAI1)
I started for the Audio library DMA setup but I need to get an interrupt each time a word must be transferred.
If I do the following, it just hangs the sketch.
I don't do anything in the IRQ yet but is it normal?
I also find strange that some of the flags below I had to define myself.
#define I2S_TCSR_FRIE ((uint32_t)0x00000100) // FIFO Request Interrupt Enable
#define I2S_TCSR_FEF ((uint32_t)0x00040000) // FIFO transmit underrun
#define I2S_TCSR_FRF ((uint32_t)0x00010000) // FIFO transmit watermark reached
#define I2S_TCSR_SEF ((uint32_t)0x00020000) // FIFO transmit frame sync error
attachInterruptVector(IRQ_SAI1, i2s1_tx_isr);
NVIC_ENABLE_IRQ(IRQ_SAI1);
I2S1_TCSR |= I2S_TCSR_TE // Transmit Enable
| I2S_TCSR_BCE // Bit Clock Enable
| I2S_TCSR_FRIE // FIFO Request Interrupt Enable
| I2S_TCSR_FR // FIFO Reset
;
This just hangs on the T4.
Are non DMA I2S transfer (interrupt based) allowed on a T4.0?
This library was supporting it on the Teensy 3.
https://github.com/hughpyle/teensy-i2s
It does not work on the Teensy4.
I want to use I2S1(mapped to SAI1)
I started for the Audio library DMA setup but I need to get an interrupt each time a word must be transferred.
If I do the following, it just hangs the sketch.
I don't do anything in the IRQ yet but is it normal?
I also find strange that some of the flags below I had to define myself.
#define I2S_TCSR_FRIE ((uint32_t)0x00000100) // FIFO Request Interrupt Enable
#define I2S_TCSR_FEF ((uint32_t)0x00040000) // FIFO transmit underrun
#define I2S_TCSR_FRF ((uint32_t)0x00010000) // FIFO transmit watermark reached
#define I2S_TCSR_SEF ((uint32_t)0x00020000) // FIFO transmit frame sync error
attachInterruptVector(IRQ_SAI1, i2s1_tx_isr);
NVIC_ENABLE_IRQ(IRQ_SAI1);
I2S1_TCSR |= I2S_TCSR_TE // Transmit Enable
| I2S_TCSR_BCE // Bit Clock Enable
| I2S_TCSR_FRIE // FIFO Request Interrupt Enable
| I2S_TCSR_FR // FIFO Reset
;
This just hangs on the T4.
Are non DMA I2S transfer (interrupt based) allowed on a T4.0?