I would agree with Frank. On the T3.x cards arrows went to each pad on the underside. With that said, the alignment of the pins on the underside doesn't really allow enough room to point to each pad. So, an arrow to each row?
I tried a couple ways to use arrows, but with the pads arranged as they are, it seemed more confusing than helpful.
Which signals are on the round testpads between 24-33?
From 24 to 32:
NVCC_PLL
VCC_CPU (0.9 to 1.3)
VDD_SNVS_IN
VDD_USB_CAP
Here's info on all the other test points....
To the left of pin 29's pad:
VDD_HIGH_CAP
Underneath the BGA, from near pin 19 to center:
GPIO_AD_B0_00
VDD_SNVS_CAP
Underneath the 8 pin FFC connector (not populated on the final product), from near 3.3V to near pin 1:
MKL02 Programming Clock
MKL02 Programming Data
PMIC_ON_REQ
Near GND and pin 0:
VBUS_USB (connected to VIN - after fuse & reverse polarity protection mosfet - the input to the 3.3V regulator)
Most of these test points are power supplies. The test fixture begins by connecting all the GND pins to GND, then applied power to one of the power pins. The test passes if all the power supplies are in the correct range, and the MKL02 chip responds to an identification command. This test is repeated for each positive power pin. Between each test, resistors are connected to all the power supply pins to fully discharge the *many* capacitors on T4. The a similar set of tests is done for each GND pin, where the T4 is "floating" at 3.3V and 1 of the GND pins is used. Access to *all* power supply signals is critical for these tests to work. Discharging all the caps is also critical. Almost all those test points are for this power pins test.
After testing all the power pins, the test fixture checks connectivity of almost all signals. Each pin is driven high with all the others low, then it's driven low with all the others high. Most are read using JTAG boundary scan, but some are read via the MKL02.
A special test is done to check both LEDs. The T4's current consumption is measured first for a baseline, then each LED is turned on, and a final measurement is done with both off. The before and after need to closely match, and each LED is checked for approx the expected increase in current consumption.
Another special test is done for the pullup resistor on PMIC_ON_REQ, by connecting a extra pulldown resistor in the tester and verifying the voltage is correct for the combination acting as a resistor divider.
More special tests are done to check the 2 USB host signals and the On/Off pin, since those aren't accessible by the JTAG boundary scan.
After the tester writes the bootloader into the MKL02 and the restore program into the top 4K sector of the W25Q16, the very last test checks for 24 MHz and 32 kHz from the 2 crystals. 24 MHz is checked by turning on the CLKOUT feature on one of the SD pins. 32 kHz is checked by GPIO_AD_B0_00, which is the only pin on the chip (as far as I know) capable outputting a direct copy of the 32 kHz oscillator (not re-synced to the IPG clock). The tester has a 74HC4060 chip to divide the high frequency into the kHz range. Then it uses FreqMeasure to check each for the correct frequency. The test is run by a Teensy 3.6, so the total error also includes its crystal. Currently the tester only fails a T4 if the total error is more than 80 ppm. This frequency test is done last because the 32 kHz crystal takes about half a second to start oscillating (or perhaps it's oscillating sooner but the iMXRT still uses its internal RC oscillator for some reason).
Actually, there are 2 more tests done, which involve power cycling again. The MKL02 control over the iMXRT PSWITCH pin is checked by verifying VCC_CPU really does turn off and can turn back on again. VBAT is also checked by powering down everything else, and then the SNVS input and output are checked (at least 2.8V arriving through the diode, and SNVS regulator creating at least 0.9V).
Maybe that's more than anyone might ever want to know about the test procedure, but hopefully it shines some light on why there are so many test points. This iMXRT chip has several power supply voltages. All need to be checked, and the tester needs to be able to fully discharge every capacitor so each individual power up test begins with the T4 fully off.
Of all those test points, I'd imagine GPIO_AD_B0_00 is probably the only one interesting for regular use. You can get one more I/O pin if you really want. But as I/O pins go, it doesn't offer much, really just another PWM. Its XBAR path is already on pin 8. Other than the 32 kHz output, it's other features aren't useful without more pins trapped under the BGA.
