Teensy 4.1 Beta Test

I believe Arduino might "just work" and ignore the duplicate files if there is a src folder.

Let's try it for 1.52-beta3 and only worry if it causes trouble.
@KurtE and @PaulStoffregen

Created empty files for .h and .cpp at top level in local copy and seemed to work. I pushed the change up to GitHub if you want to give it test @KurtE.

Just wondering if others are using something like PlatformIO or VisualMicro we should go ahead and add the patch to the source file in the .h?

EDIT: went ahead and added the path to the .h file. Retested and still compiles without error
@mjs513 - I downloaded changes rebuilt the font test example and it is running on a T4 connected up to the generic Ebay display
SdFat-beta on github has been updated to support builtin uSD on T4.1. (GPIO DSE adjustment)
           T4.1 example TeensySdioDemo
           FIFO SDIO mode.
           totalMicros  5579439
           yieldMicros  143956
           yieldCalls   183
           yieldMaxUsec 7848
Got mine! Thanks. Looks great!

I'm putting together KiCAD symbols and footprints for it.

A few initial questions:
  • What are the pins along the interior, near the back side of the SD slot? Same as T4.0? (If so, bummer that there's still no reset pin.)
  • What is the offset of the USB Host connector to the outer pins? (I'm measuring 1.27mm pin offset and something like 3.00mm row-to-row offset
  • What is the offset and spacing of the Ethernet connector to the outer pins? (Looks like it's a 2mm header.)

A few initial comments:
  • I assume that the VUSB pin is in its traditional location. Right?
  • Would be nice to have some silkscreen identifying the interior pins and the footprints of the optional memory chips.
  • Wherever possible, it would be great to have silkscreen for features on both sides.

Final question:

I know it's not ok to post pictures, but is it ok to post screenshots of the board footprint? What are you trying to keep secret?
5 center pins, I am pretty sure are the same as the T4...

USB Host pins - unless it changes is same as T3.6

Ethernet - Not sure.

VUSB - Yes

Bottom pins - Note: they can be used as IO pins. Most of the 8 pin devices have the same signals, although each has different CS pin. Would be nice to have positions of these as well. But I will try to deduce soon
Bottom pins - Note: they can be used as IO pins. Most of the 8 pin devices have the same signals, although each has different CS pin. Would be nice to have positions of these as well. But I will try to deduce soon
"Bottom pins" means footprints for the memory chips?
"Bottom pins" means footprints for the memory chips?

Yes I will ring them out again and diagram which ones are which, But the IO pins associated do have some interesting things:
48	EMC_24	4:24	Serial8(5) RX 		FLEXSPI2_A_SS0_B	PWM1_B0						
49	EMC_27	4:27	Serial8(5) RTS		FLEXSPI2_A_DATA01, SPI2(1) SCK  	PWM1_A2				1:13		
50	EMC_28	4:28	Serial8(5) CTS		FLEXSPI2_A_DATA02, SPI2(1) MOSI	PWM1_B2				1:14		
51	EMC_22	4:22		Wire1(3) SCL	FLEXSPI2_A_SS1_B	PWM3_B3, QT2_3						
52	EMC_26	4:26	Serial1(6) RX 		FLEXSPI2_A_DATA00	PWM1_B1				1:12		
53	EMC_25	4:25	Serial1(6) TX 		FLEXSPI2_A_SCLK	PWM1_A1						
54	EMC_29	4:29	Serial1(6) RTS		FLEXSPI2_A_DATA03, SPI2(1) MISO	PWM3_A0				1:15
Sorry I know the formatting is probably not great, but does show that there are some interesting things here.
Also again Both of the two footprints have 6 of these signals in common (will verify again, DATA0-3, SCLK) and each has their own CS (SS0_B, SS1_B)

EDIT: I will double check this when I receive one of the new beta boards without memory chips... Likewise hopefully update some of the functionality that is missing in core files for these pins.

But my quick ringing out again of these pins show logically if you look at the back of the board, with USB sticking up, SD pointing down, the pins ring out like:


Wider chip, pin 1 lower right:
52     GND
53     50
54     49
3.3v   51

Narrower chip (again pin 1 lower right)

52    GND
53    50
54    49
3.3v  48


Hope that makes sense...

@Paul - Do you have a draft Card both front and rear that you wish to be reviewed?
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Teensy 4.0 + USB Host is just what the doctor ordered! :cool:

Many thanks for adding me to the list.
I'm a bit busy at the moment (have been since December, honestly), so I would happily wait for the second batch or the final unit.
Quick Note, I updated my Card like view to sort of show what the bottom pins may look like...
I pushed the XLS file back up to my github project.

I hope this does not break the beta rules but it shows a picture of a T4 hosted in FRDM4236 which is just a T4 shown like a T3.6... So does not show any of the new stuff, like USB locations or ethernet or...
But for this quick view it is mostly reded out.

Edit: Let me know if you see anything that is off in this data...

Edit: Updated to fix CTS3 (pin 19 not line 19)
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I just picked up my beta board today.

What is the pitch for the ethernet pins? Is there a standard header that can be soldered into the Teensy for this?

Similarly, I have started updating my google document to talk about the Teensy 4.1. Some of the changes include:
  • Document: https://docs.google.com/spreadsheets/d/1LSi0c17iqtvpKuNSYksMG306_FpWdJcniSRR6aGNNYQ/edit?usp=sharing
  • I have moved the introduction pages (that list # of pins, processor type, etc.) to a separate sheet (I haven't added much Teensy 4.1 specific information yet);
  • I have added the sub-document names into the header bars, and put them in 3 groups, so it is more evident what section is being talked about;
  • I have moved the micro-SD card support to a separate table, and I believe I have gotten the right pin #'s;
  • I have added the external pins added by the Teensy 4.1 (pins 23 through 41), but I may not have all of the information for pins 34-41;
  • While the Teensy 3.0 columns are still in the table, I have used the 'hide column' option to reduce the width of the table normally;
  • I have removed the Teensy shield columns at the extreme right, since I have a sheet that now talks about the Teensy shields;
  • I have not yet added the underneath pads nor the ethernet support (I might wait until it is officially published before including these).
Is CTS3 really on the unlabelled pin 26 (AD_B1_14)? I'd have expected pin 19 (AD_B1_00).
Yep - Sorry it was a quick edit to add it in and I accidentally put it on line 19 instead of pin 19 :0

Updated on excel document, and pushed up... Will update the print out soon as well. Thanks

Note: as some probably have guessed, I have been playing with T4.1 beta (first ones) for a little while. The one I currently have has both a flash chip and a RAM chip...

Since Paul mentioned the libraries, I thought I would mention that a few of us have been playing with some of the other libraries to try out the extra memory.

For example the ILI9488_t3 library that was updated with this beta (Warning the new sources are in a sub-directory SRC, hopefully the next beta/release will actually have ability to remove the top level files, else we also put up some blank like files for the main header and source file.

There is now an option you can enable in the header file, that if you have a T4.1 with extra memory (like 8MB we are playing with), then the optional frame buffer can now go into this memory.
And since it has enough memory we have a version setup that the Asynchronous DMA updates can be done without needing interrupt interventions.

That is without this, we have to do some games? Why? The ILI9488 running on SPI does not have a 16 bit color mode, instead it has a 18 bit color mode.
Our Frame buffer on T4 is typically 16 bits so 320*480*2=307200 which fits on T4 DMAMEM section. We might be able to do 320*480=460800 bytes but all of the indexing of memory would be a little more complicated and we would have to only use SPI outputs of 8 bits at a time... So instead our DMA code has a couple of secondary buffers, that we convert the 16 bit colors in frame buffer to the 18 bit color mode values (actually 24 bits transfered)

Well with this extended memory we now can waste memory. So I use 32 bits per pixel for Frame buffer. (614400 bytes). I setup DMA operations to transfer 32 bits at a time, and configure SPI outputs for 24 bits, and it now can do the transfers without the overhead of interrupts and converting colors...

Also we can setup to have multiple displays of this size. Like two very large uncanny eyes, example had code with one ILI9488 and one HX8357.
I've made KiCAD symbols and footprints based on the beta sample I received yesterday.

Available here:

Symbols: https://github.com/blackketter/teensy_library

Footprints: https://github.com/blackketter/teensy.pretty

Would love some feedback!

@blackketter - just added your T4 footprint and symbol to my kicad lib. Nice work.

Footprints pretty much match what I have on my breakout board for the T4.1 (just overlaid yours on the pads I put on the pcb. Couldn't do a match up of the ethernet connector. And didn't get a chance yet to check the symbol table.
1.53 Beta Arduino 1.8.12 T4.1 beta board under Linux MSC and MSC3 are both working the same as with the T3.6, T4.0 and T4.1. mscWavePlayer is working on the T4.0 with both MSC and MSC3 (Revision B Audio Board). Still have to wire up the T4.1 audio card (Revision B) and test. I am going to order the revision D audio board.

Next up testing Ra8876LiteTeensy.

I am a little confused about the
Teensy 4.1 has an 8 MB flash chip
is that already on the board not including the unpopulated memory chips underneath the T4.1 board?
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Next up testing Ra8876LiteTeensy.
Just tested library a couple of days ago with the T4.1 using the 7.1in 1280x600 display. Worked like a charm with your graphictest and gauges sketch. More later on the other thread I guess is the best place to discuss.
I am a little confused about the
Teensy 4.1 has an 8 MB flash chip
. Is that already on the board not including the unpopulated memory chips underneath the T4.1 board?

From Paul's Post #1 this thread:
Teensy 4.1 has an 8 MB flash chip, an Ethernet PHY, and places on the bottom side to solder QSPI memory chips.

To end/limit confusion:
> T_4.0 ships with a 2 MB FLASH chip for program storage
> T_4.1 to ship with an 8 MB FLASH chip for program storage

TWO Additional QSPI addressable chip areas will appear EMPTY on the bottom side of the T_4.1 - one of each of these sizes.
> Those have been tested with:
- Larger layout with FLASH chip the size of the pads on the Teensy Audio board
- Smaller layout with 8MB PSRAM - as has become popular on ESP32 boards - some chips with ESP label.

For QSPI context here is a WINBOND FLASH on an Audio board - and a loose 8MB PSRAM chip beside it:
QSPI chips.jpg
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More later on the other thread I guess is the best place to discuss.

Not sure which other thread you are referring to. Tried Searching for it. Guess I missed it:(

Did any other of the sketches work? Specifically piptest? Very curious about the the display you are using.
@defragster - Thank you. I'll start paying attention to the compiler output for program memory size. I see what you are saying. Thanks:)
We will soon begin a public beta test for Teensy 4.1.
We expect to release Teensy 4.1 sometime in May, so the wait will not be long...

Just take my money now! :D But seriously, I'm glad to see the 4.1 is happening and I'm looking forward to ordering a couple of these as soon as they are released.