Teensy 4.1 with QSPI?

T

tjaekel

Well-known member
I need a QSPI Master interface (like regular SPI but with 4 data lanes).
I know, there is FlexSPI (for external memory, SPI flash chips or memory).

But I need the feature on regular LPSPI, to use PCS2 and PCS3 as DATA2 and DATA3.

So, does anybody know if for the SPI available on the header pins (marked as light green, e.g. MOSI1, SCK1, ...)
also the PCS2 and PCS3 signals are available?

BTW: FlexSPI as QSPI is potentially not available (with IOMUX and ALT config).
It would not help so much: I need a regular SPI with 4 serial data lanes (not all the INST, ADDR phases on FlexSPI).

Thank you.
(a spreadsheet with all the signal/pin names would be helpful, e.g. "GPIO_EMC_B2_16", so that I can lookup for the ALT functions
possible on the pins)
 
If you are excellent with soldering perhaps buying the TEENSY 41_NE Without the Ethernet Chip will do it.
U6 DP83825 Ethernet transceiver IC
Code: 
LPSPI4

PCS0 - routable to 2 pins    GPIO_B0_00 -- GPIO_B1_04
PCS1 - GPIO_B1_03
PCS2 - GPIO_B1_02
PCS3 - GPIO_B1_11
SCK - routable to 2 pins     GPIO_B0_03 -- GPIO_B1_07
SDi - routable to 2 pins     GPIO_B0_01 -- GPIO_B1_05
SDO - routable to 2 pins     GPIO_B0_02 -- GPIO_B1_06
TRG - routable to 46 pins, 62 signals
 
You can implement QSPI using FlexIO. Specifically FlexIO2 has two sets of four consecutive lines available (0-3, 16-19) and supports interrupts, DMA and external triggers (XBAR from other modules).
 
Thank you all.
Yes, I have checked the ALT functions for pins, starting at schematics.
Yes, if I would not have the ETH controller - the LPSPI4 would be able to do.

My (current) conclusions:
- LPSPI2 "could" do - but there is the external code flash memory (U3) - it is needed
- FlexSPI2_A could do - but would need to use the solder pads for PSRAM/Flash (the optional chips), and:
PCS2 (EMC40) would be missing! - it is the LDO_EN signal for the VHST (user host USB power LDO) plus PCS3 (EMC41) is not populated.
- LPSPI3: PCS2 (AD_B0_05) is not populated, PCS3 (AD_B0_06) is a signal on the "Boot Chip" - it is needed
- LPSPI4 conflicts just with PCS3 which is RXER on ETH controller:
Yes, a board w/o ETH and a wire from this pad - would work.
RX_ER on ETH could be used from EMC_26 - D0 on PSRAM (no optional chips)
- the SD Card is LPSPI1: similar to FlexSPI2_A: PCS2 (EMC_40) is LDO_EN and PCS3 (EMC_41) is not populated

So, I could use LPSPI4 with a rework on PCB - and no ETH controller, or:
wire ETH RX_ER but no optional PSRAM.

Best would be to redesign the PCB a bit - LOL:
- LDO_EN as VHST (on EMC_40) could be any other GPIO (not this one)
- EMC_41 (as PCS3) should be populated (it is not wired at all)
==> than I could use FlexSPI2_A (instead of PSRAM/Flash) or LPSPI1

Thank you all for the help.
 
tjaekel said:
I need a QSPI Master interface (like regular SPI but with 4 data lanes).
I know, there is FlexSPI (for external memory, SPI flash chips or memory).

But I need the feature on regular LPSPI, to use PCS2 and PCS3 as DATA2 and DATA3.
Click to expand...

I'm curious which (non-memory) QSPI chip you're planning to use? Can you say the part number or give a link to its info?

Asking mostly because I'm not familiar with any chips using 4 bit SPI that aren't memory.
 
Hi Paul,
I am sorry, I cannot disclose details, just:
I need those MCUs in order to test new chips (under development, bring-up after production...).
So, my DUT (Device Under Test) will be such a (new) chip. Yes, it is not a memory chip, even using QSPI for fast transfer of data.

Using a MaaxBoard-RT - which can provide a full QSPI on user headers - I have seen that FlexSPI in NXP MCU is pretty cool:
it has a programmable "micro-engine" (LUTs) for QSPI, so that any vendor specific QSPI "protocol" can be implemented.
So, it should work, just an issue to have access to all the needed pins (Teensy 4.1 cannot).

Regards
Torsten
 
keeping brainstorming with myself and FYI:
actually, the PSRAM and Flash (optional), provide a QSPI via FlexSPI2_A (with separate SS0_B and SS1_B).
This should work!
And solder pads are easy to access.
(why was I so complicated...?)

Also:
FlexSPIA, with the external code flash memory (U3) might work:
- use a parallel QSPI bus from this chip but with a SS1_B signal
- SS1_B is available on pin 22 - great
--> so, bring-out the QSPI bus on U3 (complicated) plus a separate SS1_B signal (and FW), would work as well.

All fine for now, looks promising: I will try to code my QSPI on optional PSRAM/Flash solder pads.

To be honest:
the AVNET MaaxBoard-RT cannot provide QSPI: I did a mistake on collecting needed signals
(SCLK and SS0_B are not available).
So, back to Teensy 4.1...
 
It would be far simpler to learn how to use FlexIO and the regular I/O pins... There's even master SPI sample code in the reference manual, you only need to change it slightly to output more bits in parallel.
 
FYI,
I have QSPI working as "FastGPIO" as well as as "FLEXIO"
(on a different NXP MCU board, but it should work as well on Teensy 4.1 board)

QSPI with "FastGPIO":
I can generate a QSPI write with 40 MHz, potentially up to 60 MHz possible.

QSPI with "FLEXIO":
The MCU has also a feature called "FLEXIO": you can also implement any serial interface, even a serial-parallel interface with FLEXIO, e.g. QSPI.
And it works (on another board).

Teensy 4.1 FLEXIO:
I have checked the Teensy 4.1. schematics and pins: you have so many pins available for FLEXIO!
It would be even possible to connect an 8bit serial-parallel 8080 bus interface based LCD display!

Especially, the pins on extension header allow to use FLEXIO3 with AD_B1_00 ... AD_B1_15 (16x) plus B1_00 ... B1_03 (4x)
as "consecutive" pin use on FLEXIO (for "PARALLEL" mode).

So, you have so many pins available as FLEXIO that you could implement so many more I2C, SPI, UART, ... and even a serial-parallel interface
like for LCD-displays, other connections to other boards. And QSPI is also possible (but not drivers, examples available, except "my one").

The FLEXIO based implementation works fine up to 30 MHz, the next as 60 MHz might work as well, even it looks a bit "strange" in the waveform
(SCLK is not equidistant anymore, duty cycle is a bit "strange").

So, QSPI is possible on Teensy 4.1, with FLEXIO (and "FastGPIO"), just on/with the extension header pins
(no need to reuse the FlexSPI populated for the optional QSPI flash/RAM, which is also an option (Ion solder pads)).

Cool!
 
You must log in or register to reply here.
Back
Top