Teensy 4.x I/O pin maximum load

J

johnlinford

Member
I'm tinkering with a project that (just) fits onto a Teensy 4.0 in terms of I/O capacity but virtually all the I/O is digital output including the analogue ports. Typically I am driving a single SN74LS07 input and I'm finding that the Teensy analogue pins can't pull the gate input fully LOW. The digital pins work OK. The spec for the SN74LS07 gate input is 0.2mA load to pull below 0.4V.

I seem to recall reading somewhere that the Teensy analogue pins can't drive much current but I thought I would get away with 0.2mA!

My Google-fu is failing me... is there a recommended maximum load for Teensy 4.x digital and analogue pins?

Thanks,

John
 
Can you show some code for how you're driving the analog (actually PWM) pins "low"?
If you're just using analogWrite(p, 0); I have a feeling that's not going to work as expected, since the PWM modules can't have a 0% duty cycle. This is likely to be especially problematic for an open-drain buffer like a 7407.
 
Oh, I hadn't thought of that. No I use digitalWrite(p, LOW); as I simply want an active LOW output.

The analogue pin goes LOW OK with no load but only gets down to about 1.2V with the 74LS07 gate attached. The 74LS07 gate inputs are characterised for 3V3 operation so I naively thought it would work just fine.

I can always specify a different gate type, perhaps CMOS, but having been surprised by this unexpected problem I thought I should properly understand the limitations.
 
Really need to see the code for this because it's not at all apparent how the pins are configured; I don't understand why you're referring to them as "analogue pins" if you're using digitalWrite(). The default configuration for all pins is digital GPIOs unless you configure them otherwise, you might just be missing a pinMode() call.
 
Well I am referring to them as analogue pins because that's what they are called in the documentation (A0, A1...) and they are able to receive analogue input and send PWM output. The code is really rather straightforward and yes, I have set pinMode:
Code: 
struct {    //Hardware
  struct {  //Pin
    const byte StepD0 = A0;          //Base drive step control MSB
    ...
  } Pin;
} Hardware;
...
pinMode(Hardware.Pin.StepD0, OUTPUT);
...
digitalWrite(Hardware.Pin.StepD0, Steps[Waveforms.baseCurrentStep][0]);
My understanding is that analogue pins are not as capable of sinking current as the standard digital pins, hence my question. I don't think it's a coding question.
 
They can be used as analog inputs but otherwise they're the same as the other GPIOs and can sink ~4ma. There's no reason that code shouldn't work unless the pin is being modified somewhere else or you've wired up a different physical pin (A0 = pin 14).
 
Thanks, @jmarsh. I'm driving the pin (and others) with square wave signals derived from a 2kHz timer interrupt and I can clearly see the square wave on the Teensy pin with my oscilloscope. When the 74LS07 gate is attached the square wave range is Vcc..1.2V but when the pin is unconnected I see the full Vcc..0V range. So it's definitely a pin loading problem and the only thing doing the loading is the gate input.

4mA should be ample, so I am now perplexed, especially as the standard digital pins work fine. Hence my question about the analogue pins perhaps having a different current sink capacity.

Oh well... I'll either redesign the hardware or I'll use a Teensy 4.1 to avoid having to use the analogue pins.
 
johnlinford said:
The analogue pin goes LOW OK with no load but only gets down to about 1.2V with the 74LS07 gate attached.
Click to expand...
If the 74LS07 is powered with 5V, I worry that somehow the T4 pin got exposed to higher than 3.3V - this can lead to damage. I'd double check if the T4 pin can drive a 1k resistor both to ground and to 3.3V to check its functioning.
 
MarkT said:
I'd double check if the T4 pin can drive a 1k resistor both to ground and to 3.3V to check its functioning.
Click to expand...
Good test plan Mark. I tried multiple analogue outputs, pulling them up to 3V3 and down to Gnd with various resistor values as I watched the 2kHz square wave on my oscilloscope. In all cases a 1k0 resistor in either direction results in the pin being stuck firmly to that rail. I then tried 4k7 and the result was essentially the same. Even 22k0 pulls the pin almost to rail with only about 1V of square wave output.

22k0 is a load of 0.15mA, very similar to the load specification of a 74LS07 input gate and the result is essentially what I was seeing when trying to drive the gate. So the results are consistent.

Meanwhile, on a standard I/O pin the square wave happily goes rail to rail, even with a 1k0 resistor.

Conclusion: not all GPIO pins are created equal! The analogue pins, in output mode, are very high impedance and so have low current drive capability. My guess is that the load has to be 100k plus or about 30uA: OK to drive CMOS but not much else. That's OK, I realise that the analogue pins are really designed for input level measurements but I confess that I am surprised that the impedance is quite so high in output mode.

A hardware redesign is clearly necessary for my project. Simplest solution is to just use a T4.1 and completely ignore the analogue pins.

All interesting stuff... I learned something today!
 
MarkT said:
If the 74LS07 is powered with 5V, I worry that somehow the T4 pin got exposed to higher than 3.3V - this can lead to damage. I'd double check if the T4 pin can drive a 1k resistor both to ground and to 3.3V to check its functioning.
Click to expand...
I want to say this shouldn't be the case (I've used 7405s a reasonable amount and they have the same max outgoing voltage on the input pins as the 7407s: 1.6V) but it does seem like it's been damaged somehow...

johnlinford said:
Conclusion: not all GPIO pins are created equal! The analogue pins, in output mode, are very high impedance and so have low current drive capability.
Click to expand...
This simply isn't true. Something else is wrong here, all the pins should be able to push/pull current equally well. A GPIO that could only sink 0.15ma wouldn't be any good to anyone and it would have been brought up many times.

(The T4.x has two sets of I2C pins on the "analog" pins and has no trouble driving them low when external 4.7K pullups are attached...)
 
I have to offer profound apologies!

I broke out a brand new T4.0, soldered some legs on it and ran the above test with a 1k0 resistor first to 3V3 and then to ground. Both tests were fine, with a nice rail-to-rail square wave. Went back to the original T4.0 and every one of the analogue pins was high Z.

The original T4.0 had a previous life in at least one prototype and somewhere along the line I must have broken something. It's a very odd failure mode: all eight of the analogue pins are high Z but all eight have a perfectly respectable rail-to-rail square wave under no load. There must be something common to the eight pins that died. Anyway, that device is now in the trash, lest it bite me again one day!

Ah well, 60+ years tinkering around with electronics and still things occasionally catch me out!
 
To answer the original question about the maximum I/O pin load of the Teensy 4.x: in this case, the information is actually documented. PJRC provides the relevant specifications here: https://www.pjrc.com/teensy/techspecs.html
While detailed electrical limits are not always easy to find, this particular aspect is fortunately covered.
However, this should also be found in the NXP data sheets.

​

 
Just by way of a thread conclusion, I've now breadboarded the replacement Teensy 4.0 and 74LS07 and everything is working as expected. That's the better part of a day spent chasing a non existent design fault but got there in the end and learned some new stuff along the way! Thanks everyone for the help.
 
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