Teensy 5 Dual/Quad Core

Teensy 4.1 plus (in order of importance?):
1. USB host with support for USB 3.1 SuperSpeed 10Gbit/s (or whatever the latest rev can be implemented at the time of build).​
2. Back to being 5V tolerant (saves having to use external chips to do that job when interfacing with TTL stuff).​
 
Richard H said:
Teensy 4.1 plus (in order of importance?):
1. USB host with support for USB 3.1 SuperSpeed 10Gbit/s (or whatever the latest rev can be implemented at the time of build).​
2. Back to being 5V tolerant (saves having to use external chips to do that job when interfacing with TTL stuff).​
Click to expand...
Given Paul doesn't design the actual microprocessor within the Teensy, he is dependent on the chips that are designed by the microprocessor companies. Given the newer chips no longer have 5 volt tolerance, Paul can't magically make the future Teensy be 5 volt tolerant without adding extra chips that would add to the cost.

Personally, I would have preferred if the Teensy 4.x had still had DACs (digital to analog), but again Paul has to design Teensys to use the available microprocessors that are available and within his budget to meet the design criteria.
 
5V is dying out for microcontrollers, 3.3V has been around for a long time and most peripheral chips support both voltages. I think the T4 processor is 1.8V internally anyway, so its actually "3.3V tolerant"
 
Indeed, the hardware we get really depends on what NXP (or perhaps other microcontroller manufacturers) design into their chips. I have no control over this. In the past I've had conversations with people at NXP, especially expressing desire for DACs like we had on Teensy 3.6, which appear to have had no impact on their product design decisions.

Today most 32 bit microcontrollers are made with silicon processes having mosfet gate length between 40 to 120 nm. The IMXRT1062 chip on Teensy 4.x is either 40 or 45 nm (I'm really not 100% sure... conflicting info seen). Some newer chips might be using 28 nm now, but generally speaking single chip micrococontrollers tend to use older silicon processes. The Kinetis chip used on Teensy 3.2 was 90 nm.

Info online claims Raspberry Pi 4 used 28 nm and Raspberry Pi 5 uses 16 nm. I didn't find good info about what process their RP1 I/O chip uses.

As a general rule of thumb, smaller transistors can switch faster, but they tend to need to run with lower voltage and making I/O pins tolerant of higher voltage becomes more difficult and expensive. This is why most modern chips don't have 5V tolerance, and why ever faster and more capable chips of the future probably won't have 5V tolerance.

You can wish for all sorts of powerful peripherals, and eventually as microcontrollers are made with small transistors we'll probably get them. But 5V tolerance isn't a realistic expectation.
 
PaulStoffregen said:
Indeed, the hardware we get really depends on what NXP (or perhaps other microcontroller manufacturers) design into their chips. I have no control over this. In the past I've had conversations with people at NXP, especially expressing desire for DACs like we had on Teensy 3.6, which appear to have had no impact on their product design decisions.

Today most 32 bit microcontrollers are made with silicon processes having mosfet gate length between 40 to 120 nm. The IMXRT1062 chip on Teensy 4.x is either 40 or 45 nm (I'm really not 100% sure... conflicting info seen). Some newer chips might be using 28 nm now, but generally speaking single chip micrococontrollers tend to use older silicon processes. The Kinetis chip used on Teensy 3.2 was 90 nm.

Info online claims Raspberry Pi 4 used 28 nm and Raspberry Pi 5 uses 16 nm. I didn't find good info about what process their RP1 I/O chip uses.

As a general rule of thumb, smaller transistors can switch faster, but they tend to need to run with lower voltage and making I/O pins tolerant of higher voltage becomes more difficult and expensive. This is why most modern chips don't have 5V tolerance, and why ever faster and more capable chips of the future probably won't have 5V tolerance.

You can wish for all sorts of powerful peripherals, and eventually as microcontrollers are made with small transistors we'll probably get them. But 5V tolerance isn't a realistic expectation.
Click to expand...
Fair dinkum!
 
There is a basic law for CMOS logic: power consumption is proportional to the number of switching transistors * supply voltage^2 * capacitance * clock frequency. So lower voltages allow more devices per area (or faster clocking) without overheating, and smaller transistors have less capacitance which also helps allow faster clocking.

There is also the law that limits switching speed to R * C where R is the logic MOSFETs' on-resistance and C is typical signal capacitance. R and C both depend on the dimensions and technology/process used.

Basically for faster clocking and/or lower power consumption size and voltage must go down. 0.75V is now state of the art for top end processors I believe (3nm). This leads to I/O voltages like 1.8V, well below even 3.3V. Microcontrollers are still a long way behind this curve. For this sort of high-end processor each I/O pad probably occupies as much space as tens of millions of transistors though, so we won't see simpler chips like microcontrollers in this kind of technology, there is no point and a lot of cost. I suspect 3.3V I/O will be around for quite a while.
 
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