manitou
Senior Member+
> target_compile_options(HelloWorld PRIVATE -O3)
I added this to CMakeLists.txt and recreated build/ but there was no change in performance from -Os. Any other suggestions??
thanks for tip on "mbed-baremetal"
another SystemCoreClock curiosity: if I count cycles around wait_us(1000000) with ARM_DWT_CYCCNT i get 527999885 cycles?
S0, mbed T4.0 is running at 528 MHz
On Teensy/Arduino T4.0 with delay(1000) i get 599999990 cycles as expected
---------------------------
Another test of counting cycles between GPS PPS interrupts on pin 7
code reports
This seems to indicate mbed T4.0 is running at 528 MHz ? Similar test on arduino/teensy 4.0 with F_CPU 600MHz
same drift with MCU running at 600 MHz
I added this to CMakeLists.txt and recreated build/ but there was no change in performance from -Os. Any other suggestions??
thanks for tip on "mbed-baremetal"
another SystemCoreClock curiosity: if I count cycles around wait_us(1000000) with ARM_DWT_CYCCNT i get 527999885 cycles?
Code:
cycles = ARM_DWT_CYCCNT;
wait_us(1000000);
cycles = ARM_DWT_CYCCNT - cycles;
printf("%u cycles\n", cycles);
On Teensy/Arduino T4.0 with delay(1000) i get 599999990 cycles as expected
---------------------------
Another test of counting cycles between GPS PPS interrupts on pin 7
Code:
// gpspps_cycles
#include "mbed.h"
#define ARM_DEMCR (*(volatile uint32_t *)0xE000EDFC) // Debug Exception and Monitor Control
#define ARM_DEMCR_TRCENA (1 << 24) // Enable debugging & monitoring blocks
#define ARM_DWT_CTRL (*(volatile uint32_t *)0xE0001000) // DWT control register
#define ARM_DWT_CTRL_CYCCNTENA (1 << 0) // Enable cycle count
#define ARM_DWT_CYCCNT (*(volatile uint32_t *)0xE0001004) // Cycle count register
#define LAR (*(volatile uint32_t *)0xE0001FB0) //lock for some STMF
InterruptIn gpspps(D7); // LPC1768 p5, K64F/nucleo D7, L476 PD_0
volatile uint32_t ticks, cycles;
Timer t;
void pulse() {
cycles = ARM_DWT_CYCCNT;
ticks = 1;
}
int main() {
uint32_t prev=0;
printf("\nSystemCoreClock %d %s %s\n",SystemCoreClock,__TIME__,__DATE__);
gpspps.rise(&pulse); // pps rising
t.start();
ARM_DEMCR |= ARM_DEMCR_TRCENA; // enable debug/trace cycle counter
LAR = 0xC5ACCE55; // unlock
ARM_DWT_CTRL |= ARM_DWT_CTRL_CYCCNTENA; // enable
while(1) { // wait around, interrupts will interrupt this!
if (ticks) {
uint32_t d = cycles - prev;
float ppm = (int32_t)(d - SystemCoreClock) / (SystemCoreClock / 1000000.);
printf("%u cycles %.3f ppm\n",d,ppm);
ticks = 0;
prev = cycles;
}
}
}
Code:
SystemCoreClock 528000000 14:10:06 Feb 10 2023
527995204 cycles -9.083 ppm
527995204 cycles -9.083 ppm
527995216 cycles -9.061 ppm
527995180 cycles -9.129 ppm
Code:
599994059 cycles -9.902 ppm
599994055 cycles -9.908 ppm
599994051 cycles -9.915 ppm
599994046 cycles -9.923 ppm
599994041 cycles -9.932 ppm
...
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