TLV320AIC3105 Codec in TDM mode

chipaudette said:
For Tympan, we got PDM digital mics working with the TI AIC3206 and the AIC3212. So, not your AIC. Also, we were doing I2S, not TDM. So, totally not what you asked.

If you thought it might be helpful, uou're welcome to take a look,l...

3206: https://github.com/Tympan/Tympan_Library/blob/main/src/control_aic3206.h

3212: https://github.com/Tympan/Tympan_Library/blob/main/src/control_aic3212.h

In both cases, see the method "enableDigitalMicInputs(void)"

Chip
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I've used your code a ton! Actually all my stuff started with yours and I've just edited it. Thank you so much for having it out there!
I need to go look again at what you have in the mic section.
Right now i think the mic is working but it is very faint and overwhelmed by loud noise like Jayshoe described and sounds like a clock problem. So I wonder if I need to invert the bit as described above. (I'm typing from a bar so may be mistaken.)
 
Paul,

I'm also working on this with a 4 x TLV320AIC3104 (almost identical to the AIC3015) see Updated 8x8 audio

Should I also be modifying the RCR2 BCP bit for inputs? I notice in the input_tdm.cpp code you don't set anything in RCR2
 
In my multi-TDM update I implemented a setBCLKinverted(bool invert) function (though I think I may have failed to document it…): for example, AudioOutputTDM::setBCLKinverted(true);. As it applies to the whole SAI1 channel, it’s a static function and inverts both BCP bits - there’s only one BCLK so goodness knows what happens if they’re set differently. Maybe you can have two BCLK outputs?

I should probably make that available for the SAI2/TDM2 object, thinking about it…
 
Thanks,

I wrote almost the same code today, however it didn't fix my problem (in the other 8x8 Audio update thread) as I had already inverted BCLK in hardware. It did prove, however, that the hardware inverted clock was equivalent to the software one (give or take a few nS).

I implemented the BCLK invert as an argument of the constructor, as the BCP bits need to be set prior to the clock being enabled.
 
I didn't know there were people still talking about this I missed the updates. I have one of these on my desk if you want me to look into anything. I gave up assuming that I wasn't able to get the right clock timing. I have a new module in working on though!
 
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