Hello,
I'd like to connect three PDM microphones in ultrasonic mode ( SPH0641LU4H-1) to a Teensy 4.0 at ~4.8Mhz, and then run a 4-taps IIR filter on the raw PDM bits to get the signal in the range I need. I'm currently looking for the easiest/best way to do it.
I see three options from my point of view :
- Abuse the I2S hardware as in the audio library. Only problem is the only resource I could find was an answer from PaulStoffregen in this thread, and the source code makes it look like the I2S hardware is hard to use. I'm also unsure about whether it would support a 4.8Mhz clock.
- Bit bang with interrupts and Timers.
Would anyone have any cues as to what road I should take ? I'm quite comfortable with C, embedded development and have an FPGA programming background but I don't know the MCU's datasheet by heart.
Thank you,
Alex
I'd like to connect three PDM microphones in ultrasonic mode ( SPH0641LU4H-1) to a Teensy 4.0 at ~4.8Mhz, and then run a 4-taps IIR filter on the raw PDM bits to get the signal in the range I need. I'm currently looking for the easiest/best way to do it.
I see three options from my point of view :
- Abuse the I2S hardware as in the audio library. Only problem is the only resource I could find was an answer from PaulStoffregen in this thread, and the source code makes it look like the I2S hardware is hard to use. I'm also unsure about whether it would support a 4.8Mhz clock.
- Bit bang by using polling.With the software that exists today, no. It only supports one PDM input.
But if your idea of "possible" includes editing the low-level code in the library, then theoretically up to 5 PDM inputs should be possible. The existing code could be reused with some minor changes to work on I2S2, which is nearly identical hardware to I2S1. That would give a 2nd input.
The I2S1 hardware can actually use 5 data pins, where 3 can be either input or output. So with more work on the code, theoretically a 4 channel PDM input could be made, similar to how the 8 channel I2S input works.
I believe Teensy 4 is probably fast enough to run 5 instances of the PDM 512 tap low pass FIR filter and leave plenty of CPU time left over for audio processing. But that's an assumption which should be carefully checked (by anyone who might try to make these changes).
- Bit bang with interrupts and Timers.
Would anyone have any cues as to what road I should take ? I'm quite comfortable with C, embedded development and have an FPGA programming background but I don't know the MCU's datasheet by heart.
Thank you,
Alex