Unintentional HIGH when uploading code to the Teensy 4.1

Pin 48 is likely being driven high when (after) the PSRAM initialization runs (it checks for any attached chips). In theory this could be patched out of startup.c.
I'm not aware of any reason why pin 36 would be driven high at startup.
 
Pin 48 is likely being driven high when (after) the PSRAM initialization runs (it checks for any attached chips). In theory this could be patched out of startup.c.
I'm not aware of any reason why pin 36 would be driven high at startup.

Thanks jmarsh! I decided to change from pin 48 to other pin and this fixed the issue for me. As for pin 36, I placed a pull-down using a 1K ohm resistor and was also able to solve the issue with this pin. Still not able to understand why it only happens with certains pins, thou.
 
Pin 48 is likely being driven high when (after) the PSRAM initialization runs (it checks for any attached chips). In theory this could be patched out of startup.c.
I'm not aware of any reason why pin 36 would be driven high at startup.

Yes pin 48 is driven high

Code:
FLASHMEM void configure_external_ram()
{
	// initialize pins
	IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22 = 0x1B0F9; // 100K pullup, strong drive, max speed, hyst
	IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23 = 0x110F9; // keeper, strong drive, max speed, hyst
	[COLOR="#FF0000"]IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24 = 0x1B0F9; // 100K pullup, strong drive, max speed, hyst[/COLOR]
	IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25 = 0x100F9; // strong drive, max speed, hyst
	IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26 = 0x170F9; // 47K pullup, strong drive, max speed, hyst
	IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27 = 0x170F9; // 47K pullup, strong drive, max speed, hyst
	IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28 = 0x170F9; // 47K pullup, strong drive, max speed, hyst
	IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29 = 0x170F9; // 47K pullup, strong drive, max speed, hyst

	IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22 = 8 | 0x10; // ALT1 = FLEXSPI2_A_SS1_B (Flash)
	IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23 = 8 | 0x10; // ALT1 = FLEXSPI2_A_DQS
	IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24 = 8 | 0x10; // ALT1 = FLEXSPI2_A_SS0_B (RAM)
	IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25 = 8 | 0x10; // ALT1 = FLEXSPI2_A_SCLK
	IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26 = 8 | 0x10; // ALT1 = FLEXSPI2_A_DATA0
	IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27 = 8 | 0x10; // ALT1 = FLEXSPI2_A_DATA1
	IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28 = 8 | 0x10; // ALT1 = FLEXSPI2_A_DATA2
	IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29 = 8 | 0x10; // ALT1 = FLEXSPI2_A_DATA3
From my Excel document:
Code:
Bottom Memory Connectors												
48	EMC_24	4:24	Serial8(5) RX 		FLEXSPI2_A_SS0_B	PWM1_B0						
49	EMC_27	4:27	Serial8(5) RTS		FLEXSPI2_A_DATA01, SPI2(1) SCK  	PWM1_A2				1:13		
50	EMC_28	4:28	Serial8(5) CTS		FLEXSPI2_A_DATA02, SPI2(1) MOSI	PWM1_B2				1:14		
51	EMC_22	4:22		Wire1(3) SCL	FLEXSPI2_A_SS1_B	PWM3_B3, QT2_3						
52	EMC_26	4:26	Serial1(6) RX 		FLEXSPI2_A_DATA00	PWM1_B1				1:12		
53	EMC_25	4:25	Serial1(6) TX 		FLEXSPI2_A_SCLK	PWM1_A1						
54	EMC_29	4:29	Serial1(6) RTS		FLEXSPI2_A_DATA03, SPI2(1) MISO	PWM3_A0				1:15

As for pin36? Nothing Obvious from Excel
Code:
36	B1_02    	2.18			SPI(4) CS2 	PWM2_A3		1:TX_BCLK 	IO-16	2:18,3:18

Don't see anything obvious
 
I just stopped using pin 48 and moved to another pin. I am not planning on changing the default startup code, and would have to do this every time we update Teensyduino. It seems like adding a pulldown resistor to pin 48 wouldn't help either, because it is being actively driven high. Thanks KurtE for the confirmation :D

As for pin 36, maybe it was just floating near 3.3V and the default pin mode set for this pin during startup may have forced it to stay where it was? Anyway, the addition of the pull down solved the issue with this pin.
 
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